changeset 9d85dfa4696c in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=9d85dfa4696c
description:
sim: Add debug output when executing pseudo-instructions
diffstat:
src/sim/SConscript | 1 +
src/sim/pseudo_inst.cc | 29 +++++++++++++++++++++++++++++
2 files changed, 30 insertions(+), 0 deletions(-)
diffs (216 lines):
diff -r 7b86c22356ab -r 9d85dfa4696c src/sim/SConscript
--- a/src/sim/SConscript Mon Jun 03 12:36:56 2013 +0200
+++ b/src/sim/SConscript Mon Jun 03 13:21:21 2013 +0200
@@ -72,6 +72,7 @@
DebugFlag('IPR')
DebugFlag('Interrupt')
DebugFlag('Loader')
+DebugFlag('PseudoInst')
DebugFlag('Stack')
DebugFlag('SyscallVerbose')
DebugFlag('TimeSync')
diff -r 7b86c22356ab -r 9d85dfa4696c src/sim/pseudo_inst.cc
--- a/src/sim/pseudo_inst.cc Mon Jun 03 12:36:56 2013 +0200
+++ b/src/sim/pseudo_inst.cc Mon Jun 03 13:21:21 2013 +0200
@@ -59,6 +59,7 @@
#include "cpu/quiesce_event.hh"
#include "cpu/thread_context.hh"
#include "debug/Loader.hh"
+#include "debug/PseudoInst.hh"
#include "debug/Quiesce.hh"
#include "debug/WorkItems.hh"
#include "params/BaseCPU.hh"
@@ -90,6 +91,8 @@
{
uint64_t args[4];
+ DPRINTF(PseudoInst, "PseudoInst::pseudoInst(%i, %i)\n", func, subfunc);
+
// We need to do this in a slightly convoluted way since
// getArgument() might have side-effects on arg_num. We could have
// used the Argument class, but due to the possible side effects
@@ -204,6 +207,7 @@
void
arm(ThreadContext *tc)
{
+ DPRINTF(PseudoInst, "PseudoInst::arm()\n");
if (!FullSystem)
panicFsOnlyPseudoInst("arm");
@@ -214,6 +218,7 @@
void
quiesce(ThreadContext *tc)
{
+ DPRINTF(PseudoInst, "PseudoInst::quiesce()\n");
if (!FullSystem)
panicFsOnlyPseudoInst("quiesce");
@@ -230,6 +235,7 @@
void
quiesceSkip(ThreadContext *tc)
{
+ DPRINTF(PseudoInst, "PseudoInst::quiesceSkip()\n");
if (!FullSystem)
panicFsOnlyPseudoInst("quiesceSkip");
@@ -255,6 +261,7 @@
void
quiesceNs(ThreadContext *tc, uint64_t ns)
{
+ DPRINTF(PseudoInst, "PseudoInst::quiesceNs(%i)\n", ns);
if (!FullSystem)
panicFsOnlyPseudoInst("quiesceNs");
@@ -280,6 +287,7 @@
void
quiesceCycles(ThreadContext *tc, uint64_t cycles)
{
+ DPRINTF(PseudoInst, "PseudoInst::quiesceCycles(%i)\n", cycles);
if (!FullSystem)
panicFsOnlyPseudoInst("quiesceCycles");
@@ -305,6 +313,7 @@
uint64_t
quiesceTime(ThreadContext *tc)
{
+ DPRINTF(PseudoInst, "PseudoInst::quiesceTime()\n");
if (!FullSystem) {
panicFsOnlyPseudoInst("quiesceTime");
return 0;
@@ -317,12 +326,14 @@
uint64_t
rpns(ThreadContext *tc)
{
+ DPRINTF(PseudoInst, "PseudoInst::rpns()\n");
return curTick() / SimClock::Int::ns;
}
void
wakeCPU(ThreadContext *tc, uint64_t cpuid)
{
+ DPRINTF(PseudoInst, "PseudoInst::wakeCPU(%i)\n", cpuid);
System *sys = tc->getSystemPtr();
ThreadContext *other_tc = sys->threadContexts[cpuid];
if (other_tc->status() == ThreadContext::Suspended)
@@ -332,6 +343,7 @@
void
m5exit(ThreadContext *tc, Tick delay)
{
+ DPRINTF(PseudoInst, "PseudoInst::m5exit(%i)\n", delay);
Tick when = curTick() + delay * SimClock::Int::ns;
exitSimLoop("m5_exit instruction encountered", 0, when);
}
@@ -339,6 +351,7 @@
void
m5fail(ThreadContext *tc, Tick delay, uint64_t code)
{
+ DPRINTF(PseudoInst, "PseudoInst::m5fail(%i, %i)\n", delay, code);
Tick when = curTick() + delay * SimClock::Int::ns;
exitSimLoop("m5_fail instruction encountered", code, when);
}
@@ -346,6 +359,7 @@
void
loadsymbol(ThreadContext *tc)
{
+ DPRINTF(PseudoInst, "PseudoInst::loadsymbol()\n");
if (!FullSystem)
panicFsOnlyPseudoInst("loadsymbol");
@@ -397,6 +411,8 @@
void
addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
{
+ DPRINTF(PseudoInst, "PseudoInst::addsymbol(0x%x, 0x%x)\n",
+ addr, symbolAddr);
if (!FullSystem)
panicFsOnlyPseudoInst("addSymbol");
@@ -413,6 +429,7 @@
uint64_t
initParam(ThreadContext *tc)
{
+ DPRINTF(PseudoInst, "PseudoInst::initParam()\n");
if (!FullSystem) {
panicFsOnlyPseudoInst("initParam");
return 0;
@@ -425,6 +442,7 @@
void
resetstats(ThreadContext *tc, Tick delay, Tick period)
{
+ DPRINTF(PseudoInst, "PseudoInst::resetstats(%i, %i)\n", delay, period);
if (!tc->getCpuPtr()->params()->do_statistics_insts)
return;
@@ -438,6 +456,7 @@
void
dumpstats(ThreadContext *tc, Tick delay, Tick period)
{
+ DPRINTF(PseudoInst, "PseudoInst::dumpstats(%i, %i)\n", delay, period);
if (!tc->getCpuPtr()->params()->do_statistics_insts)
return;
@@ -451,6 +470,7 @@
void
dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
{
+ DPRINTF(PseudoInst, "PseudoInst::dumpresetstats(%i, %i)\n", delay, period);
if (!tc->getCpuPtr()->params()->do_statistics_insts)
return;
@@ -464,6 +484,7 @@
void
m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
{
+ DPRINTF(PseudoInst, "PseudoInst::m5checkpoint(%i, %i)\n", delay, period);
if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
return;
@@ -476,6 +497,8 @@
uint64_t
readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
{
+ DPRINTF(PseudoInst, "PseudoInst::readfile(0x%x, 0x%x, 0x%x)\n",
+ vaddr, len, offset);
if (!FullSystem) {
panicFsOnlyPseudoInst("readfile");
return 0;
@@ -517,6 +540,8 @@
writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset,
Addr filename_addr)
{
+ DPRINTF(PseudoInst, "PseudoInst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n",
+ vaddr, len, offset, filename_addr);
ostream *os;
// copy out target filename
@@ -558,12 +583,14 @@
void
debugbreak(ThreadContext *tc)
{
+ DPRINTF(PseudoInst, "PseudoInst::debugbreak()\n");
Debug::breakpoint();
}
void
switchcpu(ThreadContext *tc)
{
+ DPRINTF(PseudoInst, "PseudoInst::switchcpu()\n");
exitSimLoop("switchcpu");
}
@@ -575,6 +602,7 @@
void
workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
{
+ DPRINTF(PseudoInst, "PseudoInst::workbegin(%i, %i)\n", workid, threadid);
tc->getCpuPtr()->workItemBegin();
System *sys = tc->getSystemPtr();
const System::Params *params = sys->params();
@@ -632,6 +660,7 @@
void
workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
{
+ DPRINTF(PseudoInst, "PseudoInst::workend(%i, %i)\n", workid, threadid);
tc->getCpuPtr()->workItemEnd();
System *sys = tc->getSystemPtr();
const System::Params *params = sys->params();
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev
