> On June 3, 2013, 1:47 a.m., Andreas Hansson wrote: > > src/cpu/kvm/base.cc, line 814 > > <http://reviews.gem5.org/r/1861/diff/1/?file=35368#file35368line814> > > > > What happens to the packet on the IprRead/Write? The reason I'm asking > > is that the packet in question will go out of scope here and I'm simply not > > sure if it is still in use or not.
The function isn't supposed to hold on to the pointer, a similar pattern is used in the AtomicSimpleCPU. > On June 3, 2013, 1:47 a.m., Andreas Hansson wrote: > > src/mem/request.hh, line 333 > > <http://reviews.gem5.org/r/1861/diff/1/?file=35369#file35369line333> > > > > Are there any locations in the code base where we assume that a virtual > > address is present? If so, could you point out where in the comment above? I don't think so. AFAIK, the only reason we make this check is because it is called from TLBs and it doesn't make sense to assign a new physical address to a request that doesn't have a virtual address. Devices normally use setPhys() instead, which updates both the address and length of the request. - Andreas ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1861/#review4374 ----------------------------------------------------------- On May 2, 2013, 7:02 a.m., Andreas Sandberg wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1861/ > ----------------------------------------------------------- > > (Updated May 2, 2013, 7:02 a.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9692:651d765c1975 > --------------------------- > kvm: Use the address finalization code in the TLB > > Reuse the address finalization code in the TLB instead of replicating > it when handling MMIO. This patch also adds support for injecting > memory mapped IPR requests into the memory system. > > > Diffs > ----- > > src/cpu/kvm/base.cc 00dca8a9b560 > src/mem/request.hh 00dca8a9b560 > > Diff: http://reviews.gem5.org/r/1861/diff/ > > > Testing > ------- > > Quick regressions pass (with the exception of 02.insttest and > 40.m5threads-test-atomic where I can't find the binaries) for all supported > architectures. Boots Linux in KVM mode on x86 when applied together with > #1860 (x86 requires APIC remapping magic from the TLB). Shouldn't affect ARM > since finalizePhysical() is a no-op. > > > Thanks, > > Andreas Sandberg > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
