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Review request for Default. Description ------- Changeset 9748:5d7be2fc04c7 --------------------------- cpu: some changes to switching 1. The fetch stage, when it overtakes from another cpu, initializes its status variable to Running. When an o3 cpu is about to switch to another cpu, the fetch stage checks that its status should be Idle. Now suppose there are two processors in the system. The operating system has just started and it is running on cpu0. Then, cpu1 would not be actually doing anything. When trying to switch to another cpu, cpu1 gets stuck because there is nothing going on that will move it from Running to Idle. I think we should have the fetchStatus be initialized to Idle state. The o3 cpu will activate some context at point in future. When it does that, it calls the function wakeFromQuiesce() on the fetch stage. This function in turn changes the fetchStatus to Running. As of now, the function only does this for thread 0. I am proposing that we pass the thread id and do it for that particular thread. 2. The TimingSimpleCPU incorrectly tested its status when switching out. 3. The commit stage should check for the its status being Idle when testing whether it needs to drain itself. 4. The atomic cpu should test its status variable before checking any other variables for deciding on draining. Diffs ----- src/cpu/o3/commit_impl.hh ea26ba576891 src/cpu/o3/cpu.cc ea26ba576891 src/cpu/o3/fetch.hh ea26ba576891 src/cpu/o3/fetch_impl.hh ea26ba576891 src/cpu/simple/atomic.cc ea26ba576891 src/cpu/simple/timing.cc ea26ba576891 Diff: http://reviews.gem5.org/r/1904/diff/ Testing ------- Thanks, Nilay Vaish _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
