changeset 63d7362bbdf2 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=63d7362bbdf2
description:
dev: consistently end device classes in 'Device'
PciDev and IntDev stuck out as the only device classes that
ended in 'Dev' rather than 'Device'. This patch takes care
of that inconsistency.
Note that you may need to delete pre-existing files matching
build/*/python/m5/internal/param_* as scons does not pick up
indirect dependencies on imported python modules when generating
params, and the PciDev -> PciDevice rename takes place in a
file (dev/Device.py) that gets imported quite a bit.
Committed by: Nilay Vaish <[email protected]>
diffstat:
src/arch/x86/interrupts.cc | 31 ++++++++++++++++---------------
src/arch/x86/interrupts.hh | 4 ++--
src/dev/Pci.py | 2 +-
src/dev/copy_engine.cc | 8 ++++----
src/dev/copy_engine.hh | 2 +-
src/dev/etherdevice.hh | 4 ++--
src/dev/i8254xGBe.cc | 8 ++++----
src/dev/ide_ctrl.cc | 16 ++++++++--------
src/dev/ide_ctrl.hh | 2 +-
src/dev/ns_gige.cc | 10 +++++-----
src/dev/pciconfigall.hh | 10 +++++-----
src/dev/pcidev.cc | 22 +++++++++++-----------
src/dev/pcidev.hh | 8 ++++----
src/dev/sinic.cc | 12 ++++++------
src/dev/x86/SConscript | 2 +-
src/dev/x86/i82094aa.cc | 6 +++---
src/dev/x86/i82094aa.hh | 2 +-
src/dev/x86/i8259.cc | 2 +-
src/dev/x86/i8259.hh | 2 +-
src/dev/x86/intdev.cc | 4 ++--
src/dev/x86/intdev.hh | 18 +++++++++---------
21 files changed, 88 insertions(+), 87 deletions(-)
diffs (truncated from 674 to 300 lines):
diff -r 3f262c18ad5d -r 63d7362bbdf2 src/arch/x86/interrupts.cc
--- a/src/arch/x86/interrupts.cc Thu Jul 11 21:56:39 2013 -0500
+++ b/src/arch/x86/interrupts.cc Thu Jul 11 21:56:50 2013 -0500
@@ -311,12 +311,13 @@
X86ISA::Interrupts::init()
{
//
- // The local apic must register its address ranges on both its pio port
- // via the basicpiodevice(piodevice) init() function and its int port
- // that it inherited from IntDev. Note IntDev is not a SimObject itself.
+ // The local apic must register its address ranges on both its pio
+ // port via the basicpiodevice(piodevice) init() function and its
+ // int port that it inherited from IntDevice. Note IntDevice is
+ // not a SimObject itself.
//
BasicPioDevice::init();
- IntDev::init();
+ IntDevice::init();
// the slave port has a range so inform the connected master
intSlavePort.sendRangeChange();
@@ -606,17 +607,17 @@
}
-X86ISA::Interrupts::Interrupts(Params * p) :
- BasicPioDevice(p), IntDev(this, p->int_latency),
- apicTimerEvent(this),
- pendingSmi(false), smiVector(0),
- pendingNmi(false), nmiVector(0),
- pendingExtInt(false), extIntVector(0),
- pendingInit(false), initVector(0),
- pendingStartup(false), startupVector(0),
- startedUp(false), pendingUnmaskableInt(false),
- pendingIPIs(0), cpu(NULL),
- intSlavePort(name() + ".int_slave", this, this)
+X86ISA::Interrupts::Interrupts(Params * p)
+ : BasicPioDevice(p), IntDevice(this, p->int_latency),
+ apicTimerEvent(this),
+ pendingSmi(false), smiVector(0),
+ pendingNmi(false), nmiVector(0),
+ pendingExtInt(false), extIntVector(0),
+ pendingInit(false), initVector(0),
+ pendingStartup(false), startupVector(0),
+ startedUp(false), pendingUnmaskableInt(false),
+ pendingIPIs(0), cpu(NULL),
+ intSlavePort(name() + ".int_slave", this, this)
{
pioSize = PageBytes;
memset(regs, 0, sizeof(regs));
diff -r 3f262c18ad5d -r 63d7362bbdf2 src/arch/x86/interrupts.hh
--- a/src/arch/x86/interrupts.hh Thu Jul 11 21:56:39 2013 -0500
+++ b/src/arch/x86/interrupts.hh Thu Jul 11 21:56:50 2013 -0500
@@ -72,7 +72,7 @@
ApicRegIndex decodeAddr(Addr paddr);
-class Interrupts : public BasicPioDevice, IntDev
+class Interrupts : public BasicPioDevice, IntDevice
{
protected:
// Storage for the APIC registers
@@ -215,7 +215,7 @@
void init();
/*
- * Functions to interact with the interrupt port from IntDev.
+ * Functions to interact with the interrupt port from IntDevice.
*/
Tick read(PacketPtr pkt);
Tick write(PacketPtr pkt);
diff -r 3f262c18ad5d -r 63d7362bbdf2 src/dev/Pci.py
--- a/src/dev/Pci.py Thu Jul 11 21:56:39 2013 -0500
+++ b/src/dev/Pci.py Thu Jul 11 21:56:50 2013 -0500
@@ -44,7 +44,7 @@
class PciDevice(DmaDevice):
type = 'PciDevice'
- cxx_class = 'PciDev'
+ cxx_class = 'PciDevice'
cxx_header = "dev/pcidev.hh"
abstract = True
platform = Param.Platform(Parent.any, "Platform this device is part of.")
diff -r 3f262c18ad5d -r 63d7362bbdf2 src/dev/copy_engine.cc
--- a/src/dev/copy_engine.cc Thu Jul 11 21:56:39 2013 -0500
+++ b/src/dev/copy_engine.cc Thu Jul 11 21:56:50 2013 -0500
@@ -60,7 +60,7 @@
using namespace CopyEngineReg;
CopyEngine::CopyEngine(const Params *p)
- : PciDev(p)
+ : PciDevice(p)
{
// All Reg regs are initialized to 0 by default
regs.chanCount = p->ChanCnt;
@@ -115,7 +115,7 @@
{
if (if_name != "dma") {
// pass it along to our super class
- return PciDev::getMasterPort(if_name, idx);
+ return PciDevice::getMasterPort(if_name, idx);
} else {
if (idx >= static_cast<int>(chan.size())) {
panic("CopyEngine::getMasterPort: unknown index %d\n", idx);
@@ -680,7 +680,7 @@
void
CopyEngine::serialize(std::ostream &os)
{
- PciDev::serialize(os);
+ PciDevice::serialize(os);
regs.serialize(os);
for (int x =0; x < chan.size(); x++) {
nameOut(os, csprintf("%s.channel%d", name(), x));
@@ -691,7 +691,7 @@
void
CopyEngine::unserialize(Checkpoint *cp, const std::string §ion)
{
- PciDev::unserialize(cp, section);
+ PciDevice::unserialize(cp, section);
regs.unserialize(cp, section);
for (int x = 0; x < chan.size(); x++)
chan[x]->unserialize(cp, csprintf("%s.channel%d", section, x));
diff -r 3f262c18ad5d -r 63d7362bbdf2 src/dev/copy_engine.hh
--- a/src/dev/copy_engine.hh Thu Jul 11 21:56:39 2013 -0500
+++ b/src/dev/copy_engine.hh Thu Jul 11 21:56:50 2013 -0500
@@ -58,7 +58,7 @@
#include "sim/drain.hh"
#include "sim/eventq.hh"
-class CopyEngine : public PciDev
+class CopyEngine : public PciDevice
{
class CopyEngineChannel : public Drainable
{
diff -r 3f262c18ad5d -r 63d7362bbdf2 src/dev/etherdevice.hh
--- a/src/dev/etherdevice.hh Thu Jul 11 21:56:39 2013 -0500
+++ b/src/dev/etherdevice.hh Thu Jul 11 21:56:50 2013 -0500
@@ -48,12 +48,12 @@
* The base EtherObject class, allows for an accesor function to a
* simobj that returns the Port.
*/
-class EtherDevice : public PciDev
+class EtherDevice : public PciDevice
{
public:
typedef EtherDeviceParams Params;
EtherDevice(const Params *params)
- : PciDev(params)
+ : PciDevice(params)
{}
const Params *
diff -r 3f262c18ad5d -r 63d7362bbdf2 src/dev/i8254xGBe.cc
--- a/src/dev/i8254xGBe.cc Thu Jul 11 21:56:39 2013 -0500
+++ b/src/dev/i8254xGBe.cc Thu Jul 11 21:56:50 2013 -0500
@@ -131,7 +131,7 @@
IGbE::init()
{
cpa = CPA::cpa();
- PciDev::init();
+ PciDevice::init();
}
EtherInt*
@@ -151,7 +151,7 @@
{
int offset = pkt->getAddr() & PCI_CONFIG_SIZE;
if (offset < PCI_DEVICE_SPECIFIC)
- PciDev::writeConfig(pkt);
+ PciDevice::writeConfig(pkt);
else
panic("Device specific PCI config space not implemented.\n");
@@ -2453,7 +2453,7 @@
void
IGbE::serialize(std::ostream &os)
{
- PciDev::serialize(os);
+ PciDevice::serialize(os);
regs.serialize(os);
SERIALIZE_SCALAR(eeOpBits);
@@ -2507,7 +2507,7 @@
void
IGbE::unserialize(Checkpoint *cp, const std::string §ion)
{
- PciDev::unserialize(cp, section);
+ PciDevice::unserialize(cp, section);
regs.unserialize(cp, section);
UNSERIALIZE_SCALAR(eeOpBits);
diff -r 3f262c18ad5d -r 63d7362bbdf2 src/dev/ide_ctrl.cc
--- a/src/dev/ide_ctrl.cc Thu Jul 11 21:56:39 2013 -0500
+++ b/src/dev/ide_ctrl.cc Thu Jul 11 21:56:50 2013 -0500
@@ -80,7 +80,7 @@
}
IdeController::IdeController(Params *p)
- : PciDev(p), primary(name() + ".primary", BARSize[0], BARSize[1]),
+ : PciDevice(p), primary(name() + ".primary", BARSize[0], BARSize[1]),
secondary(name() + ".secondary", BARSize[2], BARSize[3]),
bmiAddr(0), bmiSize(BARSize[4]),
primaryTiming(htole(timeRegWithDecodeEn)),
@@ -132,7 +132,7 @@
IdeController::intrPost()
{
primary.bmiRegs.status.intStatus = 1;
- PciDev::intrPost();
+ PciDevice::intrPost();
}
void
@@ -157,7 +157,7 @@
{
int offset = pkt->getAddr() & PCI_CONFIG_SIZE;
if (offset < PCI_DEVICE_SPECIFIC) {
- return PciDev::readConfig(pkt);
+ return PciDevice::readConfig(pkt);
}
pkt->allocate();
@@ -232,7 +232,7 @@
{
int offset = pkt->getAddr() & PCI_CONFIG_SIZE;
if (offset < PCI_DEVICE_SPECIFIC) {
- PciDev::writeConfig(pkt);
+ PciDevice::writeConfig(pkt);
} else {
switch (pkt->getSize()) {
case sizeof(uint8_t):
@@ -523,8 +523,8 @@
void
IdeController::serialize(std::ostream &os)
{
- // Serialize the PciDev base class
- PciDev::serialize(os);
+ // Serialize the PciDevice base class
+ PciDevice::serialize(os);
// Serialize channels
primary.serialize("primary", os);
@@ -565,8 +565,8 @@
void
IdeController::unserialize(Checkpoint *cp, const std::string §ion)
{
- // Unserialize the PciDev base class
- PciDev::unserialize(cp, section);
+ // Unserialize the PciDevice base class
+ PciDevice::unserialize(cp, section);
// Unserialize channels
primary.unserialize("primary", cp, section);
diff -r 3f262c18ad5d -r 63d7362bbdf2 src/dev/ide_ctrl.hh
--- a/src/dev/ide_ctrl.hh Thu Jul 11 21:56:39 2013 -0500
+++ b/src/dev/ide_ctrl.hh Thu Jul 11 21:56:50 2013 -0500
@@ -49,7 +49,7 @@
* Device model for an Intel PIIX4 IDE controller
*/
-class IdeController : public PciDev
+class IdeController : public PciDevice
{
private:
// Bus master IDE status register bit fields
diff -r 3f262c18ad5d -r 63d7362bbdf2 src/dev/ns_gige.cc
--- a/src/dev/ns_gige.cc Thu Jul 11 21:56:39 2013 -0500
+++ b/src/dev/ns_gige.cc Thu Jul 11 21:56:50 2013 -0500
@@ -146,7 +146,7 @@
{
int offset = pkt->getAddr() & PCI_CONFIG_SIZE;
if (offset < PCI_DEVICE_SPECIFIC)
- PciDev::writeConfig(pkt);
+ PciDevice::writeConfig(pkt);
else
panic("Device specific PCI config space not implemented!\n");
@@ -2126,8 +2126,8 @@
void
NSGigE::serialize(ostream &os)
{
- // Serialize the PciDev base class
- PciDev::serialize(os);
+ // Serialize the PciDevice base class
+ PciDevice::serialize(os);
/*
* Finalize any DMA events now.
@@ -2298,8 +2298,8 @@
void
NSGigE::unserialize(Checkpoint *cp, const std::string §ion)
{
- // Unserialize the PciDev base class
- PciDev::unserialize(cp, section);
+ // Unserialize the PciDevice base class
+ PciDevice::unserialize(cp, section);
UNSERIALIZE_SCALAR(regs.command);
UNSERIALIZE_SCALAR(regs.config);
diff -r 3f262c18ad5d -r 63d7362bbdf2 src/dev/pciconfigall.hh
--- a/src/dev/pciconfigall.hh Thu Jul 11 21:56:39 2013 -0500
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