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src/arch/x86/utility.hh
<http://reviews.gem5.org/r/1918/#comment4231>

    These functions aren't quite as symmetric as they appear to be.  Seems like 
the type of the arg to convX87TagsToXTags should match the return type of 
convX87XTagsToTags.  Also, should the second function be named 
convXTagsToX87Tags?



src/arch/x86/utility.cc
<http://reviews.gem5.org/r/1918/#comment4230>

    Can you document what's going on here a little bit?


- Steve Reinhardt


On June 13, 2013, 4:26 a.m., Andreas Sandberg wrote:
> 
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> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/1918/
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> 
> (Updated June 13, 2013, 4:26 a.m.)
> 
> 
> Review request for Default and Gabe Black.
> 
> 
> Repository: gem5
> 
> 
> Description
> -------
> 
> Changeset 9760:5c7f9a77bfdd
> ---------------------------
> x86: Add support for FXSAVE, FXSAVE64, FXRSTOR, and FXRSTOR64
> 
> 
> Diffs
> -----
> 
>   
> src/arch/x86/isa/insts/simd128/integer/save_and_restore_state/save_and_restore_state.py
>  9df73385c878 
>   src/arch/x86/isa/decoder/two_byte_opcodes.isa 9df73385c878 
>   src/arch/x86/isa/microops/regop.isa 9df73385c878 
>   src/arch/x86/utility.hh 9df73385c878 
>   src/arch/x86/utility.cc 9df73385c878 
> 
> Diff: http://reviews.gem5.org/r/1918/diff/
> 
> 
> Testing
> -------
> 
> Quick regressions pass. Minor stat differences in full regressions (to be 
> expected since some instructions aren't no-ops anymore). Solves a bug 
> triggered by switching between a simulated CPU that tries to save the x87 
> state and a virtualized CPU that restores the state (which is completely 
> bogus unless FXSAVE is implemented).
> 
> 
> Thanks,
> 
> Andreas Sandberg
> 
>

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