I haven't had time to investigate why there are more misses if the buffer size is set to match the cache. I'll try to look at it by next week.
Anthony Gutierrez http://web.eecs.umich.edu/~atgutier On Mon, Jul 15, 2013 at 11:24 AM, Ali Saidi <sa...@umich.edu> wrote: > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1726/ > > On February 25th, 2013, 2:39 p.m. UTC, *Ali Saidi* wrote: > > this seems fine with me. If you set the buffer size to 64, do you see any > statistics changes? If not, feel free to commit. > > > On February 27th, 2013, 7:29 a.m. UTC, *Anthony Gutierrez* wrote: > > There are a few more misses, not a significant number, but there are more. > I'm still trying to figure out why. > > Any updates? Should we get this committed? > > > - Ali > > On February 18th, 2013, 11:04 a.m. UTC, Anthony Gutierrez wrote: > Review request for Default. > By Anthony Gutierrez. > > *Updated Feb. 18, 2013, 11:04 a.m.* > *Repository: * gem5 > Description > > Changeset 9543:d67d38fdc178 > --------------------------- > O3 CPU: allow the fetch buffer to be smaller than a cache line > > the current implementation of the fetch buffer in the o3 cpu > is only allowed to be the size of a cache line. some > architectures, e.g., ARM, have fetch buffers smaller than a cache > line, see slide 22 > at:http://www.arm.com/files/pdf/at-exploring_the_design_of_the_cortex-a15.pdf > > this patch allows the fetch buffer to be set to values smaller > than a cache line. > > Testing > > ran several of the shorter SPEC CPU2006 benchmarks with test input. > icache.overall_accesses::total stat was validated against real > cortex A15 hardware, the value is much closer now. > > Diffs > > - configs/common/O3_ARM_v7a.py > (0ac00d9a8aaf8be3749dbe03b3992e8d24ef9b07) > - src/cpu/o3/O3CPU.py (0ac00d9a8aaf8be3749dbe03b3992e8d24ef9b07) > - src/cpu/o3/fetch.hh (0ac00d9a8aaf8be3749dbe03b3992e8d24ef9b07) > - src/cpu/o3/fetch_impl.hh (0ac00d9a8aaf8be3749dbe03b3992e8d24ef9b07) > > View Diff <http://reviews.gem5.org/r/1726/diff/> > _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev