> On Sept. 19, 2013, 1:09 a.m., Steve Reinhardt wrote: > > src/cpu/kvm/x86_cpu.cc, line 1059 > > <http://reviews.gem5.org/r/2009/diff/1/?file=37554#file37554line1059> > > > > Should this be KVM_GET_DEBUGREGS?
You're probably right, I'll change it. It doesn't really matter though since they appear as a pair in the kernel. - Andreas ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2009/#review4709 ----------------------------------------------------------- On Sept. 10, 2013, 3:33 p.m., Andreas Sandberg wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2009/ > ----------------------------------------------------------- > > (Updated Sept. 10, 2013, 3:33 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 9869:6a76572b59a9 > --------------------------- > kvm: Initial x86 support > > This changeset adds support for KVM on x86. Full support is split > across a number of commits since some features are relatively > complex. This changeset includes support for: > > * Integer state synchronization (including segment regs) > * CPUID (gem5's CPUID values are inserted into KVM) > * x86 legacy IO (remapped and handled by gem5's memory system) > * Memory mapped IO > * PCI > * MSRs > * State dumping > > Most of the functionality is fairly straight forward. There are some > quirks to support PCI enumerations since this is done in the TLB(!) in > the simulated CPUs. We currently replicate some of that code. > > Unlike the ARM implementation, the x86 implementation uses the virtual > CPU does not use the cycles hardware counter. KVM on x86 simulates the > time stamp counter (TSC) in the kernel. If we just measure host cycles > using perfevent, we might end up measuring a slightly different number > of cycles. If we don't get the cycle accounting right, we might end up > rewinding the TSC, with all kinds of chaos as a result. > > An additional feature of the KVM CPU on x86 is extended state > dumping. This enables Python scripts controlling the simulator to > request dumping of a subset of the processor state. The following > methods are currenlty supported: > > * dumpFpuRegs > * dumpIntRegs > * dumpSpecRegs > * dumpDebugRegs > * dumpXCRs > * dumpXSave > * dumpVCpuEvents > * dumpMSRs > > Known limitations: > * M5 ops are currently not supported. > * FPU synchronization is not supported (only affects CPU switching). > > Both of the limitations will be addressed in separate commits. > > *** > This patch is a part of series of changes to add support for KVM on x86. See > https://github.com/andysan/gem5/tree/kvm-x86 for the full series. > > > Diffs > ----- > > SConstruct cc5797147e1c > src/cpu/kvm/SConscript cc5797147e1c > src/cpu/kvm/X86KvmCPU.py PRE-CREATION > src/cpu/kvm/vm.hh cc5797147e1c > src/cpu/kvm/vm.cc cc5797147e1c > src/cpu/kvm/x86_cpu.hh PRE-CREATION > src/cpu/kvm/x86_cpu.cc PRE-CREATION > > Diff: http://reviews.gem5.org/r/2009/diff/ > > > Testing > ------- > > > Thanks, > > Andreas Sandberg > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
