changeset 7e0dff1c165b in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=7e0dff1c165b
description:
kvm: Initial x86 support
This changeset adds support for KVM on x86. Full support is split
across a number of commits since some features are relatively
complex. This changeset includes support for:
* Integer state synchronization (including segment regs)
* CPUID (gem5's CPUID values are inserted into KVM)
* x86 legacy IO (remapped and handled by gem5's memory system)
* Memory mapped IO
* PCI
* MSRs
* State dumping
Most of the functionality is fairly straight forward. There are some
quirks to support PCI enumerations since this is done in the TLB(!) in
the simulated CPUs. We currently replicate some of that code.
Unlike the ARM implementation, the x86 implementation of the virtual
CPU does not use the cycles hardware counter. KVM on x86 simulates the
time stamp counter (TSC) in the kernel. If we just measure host cycles
using perfevent, we might end up measuring a slightly different number
of cycles. If we don't get the cycle accounting right, we might end up
rewinding the TSC, with all kinds of chaos as a result.
An additional feature of the KVM CPU on x86 is extended state
dumping. This enables Python scripts controlling the simulator to
request dumping of a subset of the processor state. The following
methods are currenlty supported:
* dumpFpuRegs
* dumpIntRegs
* dumpSpecRegs
* dumpDebugRegs
* dumpXCRs
* dumpXSave
* dumpVCpuEvents
* dumpMSRs
Known limitations:
* M5 ops are currently not supported.
* FPU synchronization is not supported (only affects CPU switching).
Both of the limitations will be addressed in separate commits.
diffstat:
SConstruct | 1 +
src/cpu/kvm/SConscript | 3 +
src/cpu/kvm/X86KvmCPU.py | 45 +
src/cpu/kvm/vm.cc | 96 +++
src/cpu/kvm/vm.hh | 52 ++
src/cpu/kvm/x86_cpu.cc | 1122 ++++++++++++++++++++++++++++++++++++++++++++++
src/cpu/kvm/x86_cpu.hh | 225 +++++++++
7 files changed, 1544 insertions(+), 0 deletions(-)
diffs (truncated from 1638 to 300 lines):
diff -r 372d3611c693 -r 7e0dff1c165b SConstruct
--- a/SConstruct Thu Sep 19 17:55:04 2013 +0200
+++ b/SConstruct Wed Sep 25 12:24:26 2013 +0200
@@ -942,6 +942,7 @@
def is_isa_kvm_compatible(isa):
isa_comp_table = {
"arm" : ( "armv7l" ),
+ "x86" : ( "x86_64" ),
}
try:
import platform
diff -r 372d3611c693 -r 7e0dff1c165b src/cpu/kvm/SConscript
--- a/src/cpu/kvm/SConscript Thu Sep 19 17:55:04 2013 +0200
+++ b/src/cpu/kvm/SConscript Wed Sep 25 12:24:26 2013 +0200
@@ -51,6 +51,9 @@
if env['TARGET_ISA'] == 'arm':
SimObject('ArmKvmCPU.py')
Source('arm_cpu.cc')
+ elif env['TARGET_ISA'] == 'x86':
+ SimObject('X86KvmCPU.py')
+ Source('x86_cpu.cc')
DebugFlag('Kvm', 'Basic KVM Functionality')
DebugFlag('KvmContext', 'KVM/gem5 context synchronization')
diff -r 372d3611c693 -r 7e0dff1c165b src/cpu/kvm/X86KvmCPU.py
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/cpu/kvm/X86KvmCPU.py Wed Sep 25 12:24:26 2013 +0200
@@ -0,0 +1,45 @@
+# Copyright (c) 2013 Andreas Sandberg
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.params import *
+from BaseKvmCPU import BaseKvmCPU
+
+class X86KvmCPU(BaseKvmCPU):
+ type = 'X86KvmCPU'
+ cxx_header = "cpu/kvm/x86_cpu.hh"
+
+ @classmethod
+ def export_methods(cls, code):
+ code('''
+ void dumpFpuRegs();
+ void dumpIntRegs();
+ void dumpSpecRegs();
+ void dumpXCRs();
+ void dumpXSave();
+ void dumpVCpuEvents();
+''')
diff -r 372d3611c693 -r 7e0dff1c165b src/cpu/kvm/vm.cc
--- a/src/cpu/kvm/vm.cc Thu Sep 19 17:55:04 2013 +0200
+++ b/src/cpu/kvm/vm.cc Wed Sep 25 12:24:26 2013 +0200
@@ -45,6 +45,7 @@
#include <unistd.h>
#include <cerrno>
+#include <memory>
#include "cpu/kvm/vm.hh"
#include "debug/Kvm.hh"
@@ -140,6 +141,46 @@
}
bool
+Kvm::capVCPUEvents() const
+{
+#ifdef KVM_CAP_VCPU_EVENTS
+ return checkExtension(KVM_CAP_VCPU_EVENTS) != 0;
+#else
+ return false;
+#endif
+}
+
+bool
+Kvm::capDebugRegs() const
+{
+#ifdef KVM_CAP_DEBUGREGS
+ return checkExtension(KVM_CAP_DEBUGREGS) != 0;
+#else
+ return false;
+#endif
+}
+
+bool
+Kvm::capXCRs() const
+{
+#ifdef KVM_CAP_XCRS
+ return checkExtension(KVM_CAP_XCRS) != 0;
+#else
+ return false;
+#endif
+}
+
+bool
+Kvm::capXSave() const
+{
+#ifdef KVM_CAP_XSAVE
+ return checkExtension(KVM_CAP_XSAVE) != 0;
+#else
+ return false;
+#endif
+}
+
+bool
Kvm::getSupportedCPUID(struct kvm_cpuid2 &cpuid) const
{
#if defined(__i386__) || defined(__x86_64__)
@@ -155,6 +196,61 @@
#endif
}
+const Kvm::CPUIDVector &
+Kvm::getSupportedCPUID() const
+{
+ if (supportedCPUIDCache.empty()) {
+ std::unique_ptr<struct kvm_cpuid2> cpuid;
+ int i(1);
+ do {
+ cpuid.reset((struct kvm_cpuid2 *)operator new(
+ sizeof(kvm_cpuid2) + i *
sizeof(kvm_cpuid_entry2)));
+
+ cpuid->nent = i;
+ ++i;
+ } while (!getSupportedCPUID(*cpuid));
+ supportedCPUIDCache.assign(cpuid->entries,
+ cpuid->entries + cpuid->nent);
+ }
+
+ return supportedCPUIDCache;
+}
+
+bool
+Kvm::getSupportedMSRs(struct kvm_msr_list &msrs) const
+{
+#if defined(__i386__) || defined(__x86_64__)
+ if (ioctl(KVM_GET_MSR_INDEX_LIST, (void *)&msrs) == -1) {
+ if (errno == E2BIG)
+ return false;
+ else
+ panic("KVM: Failed to get supported CPUID (errno: %i)\n", errno);
+ } else
+ return true;
+#else
+ panic("KVM: getSupportedCPUID is unsupported on this platform.\n");
+#endif
+}
+
+const Kvm::MSRIndexVector &
+Kvm::getSupportedMSRs() const
+{
+ if (supportedMSRCache.empty()) {
+ std::unique_ptr<struct kvm_msr_list> msrs;
+ int i(0);
+ do {
+ msrs.reset((struct kvm_msr_list *)operator new(
+ sizeof(kvm_msr_list) + i * sizeof(uint32_t)));
+
+ msrs->nmsrs = i;
+ ++i;
+ } while (!getSupportedMSRs(*msrs));
+ supportedMSRCache.assign(msrs->indices, msrs->indices + msrs->nmsrs);
+ }
+
+ return supportedMSRCache;
+}
+
int
Kvm::checkExtension(int extension) const
{
diff -r 372d3611c693 -r 7e0dff1c165b src/cpu/kvm/vm.hh
--- a/src/cpu/kvm/vm.hh Thu Sep 19 17:55:04 2013 +0200
+++ b/src/cpu/kvm/vm.hh Wed Sep 25 12:24:26 2013 +0200
@@ -40,6 +40,8 @@
#ifndef __CPU_KVM_KVMVM_HH__
#define __CPU_KVM_KVMVM_HH__
+#include <vector>
+
#include "base/addr_range.hh"
#include "sim/sim_object.hh"
@@ -72,6 +74,9 @@
friend class KvmVM;
public:
+ typedef std::vector<struct kvm_cpuid_entry2> CPUIDVector;
+ typedef std::vector<uint32_t> MSRIndexVector;
+
virtual ~Kvm();
Kvm *create();
@@ -117,6 +122,18 @@
* @see KvmVM::createIRQChip()
*/
bool capIRQChip() const;
+
+ /** Support for getting and setting the kvm_vcpu_events structure. */
+ bool capVCPUEvents() const;
+
+ /** Support for getting and setting the kvm_debugregs structure. */
+ bool capDebugRegs() const;
+
+ /** Support for getting and setting the x86 XCRs. */
+ bool capXCRs() const;
+
+ /** Support for getting and setting the kvm_xsave structure. */
+ bool capXSave() const;
/** @} */
/**
@@ -128,6 +145,35 @@
*/
bool getSupportedCPUID(struct kvm_cpuid2 &cpuid) const;
+ /**
+ * Get the CPUID features supported by the hardware and Kvm.
+ *
+ * @note Requires capExtendedCPUID().
+ *
+ * @note This method uses an internal cache to minimize the number
+ * of calls into the kernel.
+ *
+ * @return Reference to cached MSR index list.
+ */
+ const CPUIDVector &getSupportedCPUID() const;
+
+ /**
+ * Get the MSRs supported by the hardware and Kvm.
+ *
+ * @return False if the allocation is too small, true on success.
+ */
+ bool getSupportedMSRs(struct kvm_msr_list &msrs) const;
+
+ /**
+ * Get the MSRs supported by the hardware and Kvm.
+ *
+ * @note This method uses an internal cache to minimize the number
+ * of calls into the kernel.
+ *
+ * @return Reference to cached MSR index list.
+ */
+ const MSRIndexVector &getSupportedMSRs() const;
+
protected:
/**
* Check for the presence of an extension to the KVM API.
@@ -186,6 +232,12 @@
/** Size of the MMAPed vCPU parameter area. */
int vcpuMMapSize;
+ /** Cached vector of supported CPUID entries. */
+ mutable CPUIDVector supportedCPUIDCache;
+
+ /** Cached vector of supported MSRs. */
+ mutable MSRIndexVector supportedMSRCache;
+
/** Singleton instance */
static Kvm *instance;
};
diff -r 372d3611c693 -r 7e0dff1c165b src/cpu/kvm/x86_cpu.cc
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/cpu/kvm/x86_cpu.cc Wed Sep 25 12:24:26 2013 +0200
@@ -0,0 +1,1122 @@
+/*
+ * Copyright (c) 2013 Andreas Sandberg
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
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