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Ship it! Ship It! - Ali Saidi On Oct. 7, 2013, 12:13 p.m., Andreas Sandberg wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2033/ > ----------------------------------------------------------- > > (Updated Oct. 7, 2013, 12:13 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 9905:43b6cd6d74b1 > --------------------------- > mem: Use a flag instead of address bit 63 for generic IPRs > > Using address bit 63 to identify generic IPRs caused problems on > SPARC, where IPRs are heavily used. This changeset redefines how > generic IPRs are identified. Instead of using bit 63, we now use a > separate flag (GENERIC_IPR) a memory request. > > > Diffs > ----- > > src/arch/generic/mmapped_ipr.hh e672a39fd426 > src/arch/generic/mmapped_ipr.cc e672a39fd426 > src/arch/x86/tlb.cc e672a39fd426 > src/mem/request.hh e672a39fd426 > > Diff: http://reviews.gem5.org/r/2033/diff/ > > > Testing > ------- > > m5ops using the IPR interface works on x86 in kvm. Quick regressions for ARM, > SPARC, MIPS, X86 pass with the exception of the insttest and m5threads tests > on SPARC (missing binaries). Can't run the affected (80.solaris-boot) test > case due to missing binaries. > > > Thanks, > > Andreas Sandberg > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
