changeset 32694c24ccb1 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=32694c24ccb1
description:
arm: Add a 'clear PPI' method to gic_pl390
The underlying assumption that all PPIs must be edge-triggered is
strained when the architected timers and VGIC interfaces make
level-behaviour observable. For example, a virtual timer interrupt
'goes away' when the hypervisor is entered and the vtimer is disabled;
this requires a PPI to be de-activated.
The new method simply clears the interrupt pending state.
diffstat:
src/dev/arm/base_gic.hh | 3 ++-
src/dev/arm/gic_pl390.cc | 11 ++++++++++-
src/dev/arm/gic_pl390.hh | 5 ++++-
3 files changed, 16 insertions(+), 3 deletions(-)
diffs (66 lines):
diff -r d979dddf26a5 -r 32694c24ccb1 src/dev/arm/base_gic.hh
--- a/src/dev/arm/base_gic.hh Thu Oct 17 10:20:45 2013 -0500
+++ b/src/dev/arm/base_gic.hh Thu Oct 17 10:20:45 2013 -0500
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012 ARM Limited
+ * Copyright (c) 2012-2013 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -75,6 +75,7 @@
* @param cpu CPU to forward interrupt to
*/
virtual void sendPPInt(uint32_t num, uint32_t cpu) = 0;
+ virtual void clearPPInt(uint32_t num, uint32_t cpu) = 0;
/**
* Clear an interrupt from a device that is connected to the GIC.
diff -r d979dddf26a5 -r 32694c24ccb1 src/dev/arm/gic_pl390.cc
--- a/src/dev/arm/gic_pl390.cc Thu Oct 17 10:20:45 2013 -0500
+++ b/src/dev/arm/gic_pl390.cc Thu Oct 17 10:20:45 2013 -0500
@@ -692,7 +692,7 @@
void
Pl390::sendPPInt(uint32_t num, uint32_t cpu)
{
- DPRINTF(Interrupt, "Received Interrupt number %d, cpuTarget %#x: \n",
+ DPRINTF(Interrupt, "Received PPI %d, cpuTarget %#x: \n",
num, cpu);
cpuPpiPending[cpu] |= 1 << (num - SGI_MAX);
updateIntState(intNumToWord(num));
@@ -705,6 +705,15 @@
}
void
+Pl390::clearPPInt(uint32_t num, uint32_t cpu)
+{
+ DPRINTF(Interrupt, "Clearing PPI %d, cpuTarget %#x: \n",
+ num, cpu);
+ cpuPpiPending[cpu] &= ~(1 << (num - SGI_MAX));
+ updateIntState(intNumToWord(num));
+}
+
+void
Pl390::postInt(uint32_t cpu, Tick when)
{
if (!(postIntEvent[cpu]->scheduled()))
diff -r d979dddf26a5 -r 32694c24ccb1 src/dev/arm/gic_pl390.hh
--- a/src/dev/arm/gic_pl390.hh Thu Oct 17 10:20:45 2013 -0500
+++ b/src/dev/arm/gic_pl390.hh Thu Oct 17 10:20:45 2013 -0500
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010 ARM Limited
+ * Copyright (c) 2010, 2013 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -287,6 +287,9 @@
* Depending on the configuration, the gic may de-assert it's cpu line
* @param number number of interrupt to send */
void clearInt(uint32_t number);
+
+ /** Clear a (level-sensitive) PPI */
+ void clearPPInt(uint32_t num, uint32_t cpu);
/** @} */
/** @{ */
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