Hi Wayne, I am not a Ruby expert, so someone else might have a more complete answer.
1. PhysicalMemory is the memory allocated by the host machine, and exposed to the guest. You are right in that createBackingStore is where it gets allocated. 2. The names memories, physmem etc, that you find in the python scripts, are just variable names, and can be changed to any arbitrary string. The actual C++ implementation does not care what the memories are called. As a side note, Ruby is a bit odd here since it creates a memory to actually store data (with the underlying storage according to 1), and then a “performance” model of the memory controller as an integrated part of Ruby. 3. Someone that uses Ruby can hopefully answer this. With the normal gem5 memory system, creating various memory controllers is rather straight forward (see the men-channels and men-type parameters in the fs.py and se.py scripts), but I’m not sure how to do it with Ruby. Andreas On 1/9/14, 9:25 AM, "张明哲" <[email protected]> wrote: >Dear gem5 team, > >I am trying to understand and modify gem5 memory system. However, I am not >familiar with swig and confused about gem5 memory system. > >First, does the fs.py of X86 linux system use *PhysicalMemory* as wrapper >of *TestMemClass*? >When I try to find how gem5 allocate memory for simulated system, I only >find *mmap()* function in *PhysicalMemory::createBackingStore*. As far as >I >see, all memory will be inited in *createBackingStore?* > >Second, the *memories* of *test_sys* in fs.py contain: *physmem* and >*memories. >*As I understand, *memories **, *instead of *physmem,* is used for >*physmem >*variable in *sim/system.cc**. *In fs.py, how is *physmem *used if there >is no corresponding code in c++ to *physmem*? > >Third, if I want to add two memory controller to *test_sys*, should I >change the code >*self.physmem = MemClass(range = AddrRange(mdesc.mem()))* >to >*self.physmem = PhysicalMemory(self.name <http://self.name>, >self.memories)* >? > >Thank you for your reply first~ > >-- >Best regards！ >------------------------------------------------------------------- > >Wayne Zhang >Department of Computer Science, HKU >E-mail:[email protected] <[email protected]> >_______________________________________________ >gem5-dev mailing list >[email protected] >http://m5sim.org/mailman/listinfo/gem5-dev -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782 _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
