changeset c75015bbbd78 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=c75015bbbd78
description:
cpu: Relax check on squashed non-speculative instructions
This patch relaxes the check performed when squashing non-speculative
instructions, as it caused problems with loads that were marked ready,
and then stalled on a blocked cache. The assertion is now allowing
memory references to be non-faulting.
diffstat:
src/cpu/o3/inst_queue_impl.hh | 9 ++++++++-
1 files changed, 8 insertions(+), 1 deletions(-)
diffs (20 lines):
diff -r dffa80408656 -r c75015bbbd78 src/cpu/o3/inst_queue_impl.hh
--- a/src/cpu/o3/inst_queue_impl.hh Fri Jan 24 15:29:29 2014 -0600
+++ b/src/cpu/o3/inst_queue_impl.hh Fri Jan 24 15:29:29 2014 -0600
@@ -1192,8 +1192,15 @@
NonSpecMapIt ns_inst_it =
nonSpecInsts.find(squashed_inst->seqNum);
+ // we remove non-speculative instructions from
+ // nonSpecInsts already when they are ready, and so we
+ // cannot always expect to find them
if (ns_inst_it == nonSpecInsts.end()) {
- assert(squashed_inst->getFault() != NoFault);
+ // loads that became ready but stalled on a
+ // blocked cache are alreayd removed from
+ // nonSpecInsts, and have not faulted
+ assert(squashed_inst->getFault() != NoFault ||
+ squashed_inst->isMemRef());
} else {
(*ns_inst_it).second = NULL;
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