Hi Nilay, I suggest we at least add a warning in this case, as the memory system might not look as expected.
Andreas On 1/28/14, 12:50 AM, "Nilay Vaish" <[email protected]> wrote: >changeset fae4550d2103 in /z/repo/gem5 >details: http://repo.gem5.org/gem5?cmd=changeset;node=fae4550d2103 >description: > config: allow more than 3GB of memory for x86 simulations > This patch edits the configuration files so that x86 simulations can > have > more than 3GB of memory. It also corrects a bug in the MemConfig.py >script. > >diffstat: > > configs/common/FSConfig.py | 28 ++++++++++++++++++++++++---- > configs/common/MemConfig.py | 2 +- > configs/example/fs.py | 3 ++- > 3 files changed, 27 insertions(+), 6 deletions(-) > >diffs (80 lines): > >diff -r 48a9e57de52e -r fae4550d2103 configs/common/FSConfig.py >--- a/configs/common/FSConfig.py Mon Jan 27 13:30:37 2014 -0600 >+++ b/configs/common/FSConfig.py Mon Jan 27 18:50:51 2014 -0600 >@@ -407,7 +407,16 @@ > self.mem_mode = mem_mode > > # Physical memory >- self.mem_ranges = [AddrRange(mdesc.mem())] >+ # On the PC platform, the memory region 0xC0000000-0xFFFFFFFF is >reserved >+ # for various devices. Hence, if the physical memory size is >greater than >+ # 3GB, we need to split it into two parts. >+ excess_mem_size = \ >+ convert.toMemorySize(mdesc.mem()) - convert.toMemorySize('3GB') >+ if excess_mem_size <= 0: >+ self.mem_ranges = [AddrRange(mdesc.mem())] >+ else: >+ self.mem_ranges = [AddrRange('3GB'), >+ AddrRange(Addr('4GB'), size = excess_mem_size)] > > # Platform > self.pc = Pc() >@@ -501,21 +510,32 @@ > # just to avoid corner cases. > phys_mem_size = sum(map(lambda r: r.size(), self.mem_ranges)) > assert(phys_mem_size >= 0x200000) >+ assert(len(self.mem_ranges) <= 2) > >- self.e820_table.entries = \ >+ entries = \ > [ > # Mark the first megabyte of memory as reserved > X86E820Entry(addr = 0, size = '639kB', range_type = 1), > X86E820Entry(addr = 0x9fc00, size = '385kB', range_type = 2), >- # Mark the rest as available >+ # Mark the rest of physical memory as available > X86E820Entry(addr = 0x100000, >- size = '%dB' % (phys_mem_size - 0x100000), >+ size = '%dB' % (self.mem_ranges[0].size() - 0x100000), > range_type = 1), > # Reserve the last 16kB of the 32-bit address space for the > # m5op interface > X86E820Entry(addr=0xFFFF0000, size='64kB', range_type=2), > ] > >+ # In case the physical memory is greater than 3GB, we split it into >two >+ # parts and add a separate e820 entry for the second part. This >entry >+ # starts at 0x100000000, which is the first address after the space >+ # reserved for devices. >+ if len(self.mem_ranges) == 2: >+ entries.append(X86E820Entry(addr = 0x100000000, >+ size = '%dB' % (self.mem_ranges[1].size()), range_type = 1)) >+ >+ self.e820_table.entries = entries >+ > # Command line > self.boot_osflags = 'earlyprintk=ttyS0 console=ttyS0 lpj=7999923 ' + >\ > 'root=/dev/hda1' >diff -r 48a9e57de52e -r fae4550d2103 configs/common/MemConfig.py >--- a/configs/common/MemConfig.py Mon Jan 27 13:30:37 2014 -0600 >+++ b/configs/common/MemConfig.py Mon Jan 27 18:50:51 2014 -0600 >@@ -189,5 +189,5 @@ > system.mem_ctrls = mem_ctrls > > # Connect the controllers to the membus >- for i in xrange(nbr_mem_ctrls): >+ for i in xrange(len(system.mem_ctrls)): > system.mem_ctrls[i].port = system.membus.master >diff -r 48a9e57de52e -r fae4550d2103 configs/example/fs.py >--- a/configs/example/fs.py Mon Jan 27 13:30:37 2014 -0600 >+++ b/configs/example/fs.py Mon Jan 27 18:50:51 2014 -0600 >@@ -96,7 +96,8 @@ > sys.exit(1) > else: > if options.dual: >- bm = [SysConfig(disk=options.disk_image, mem=options.mem_size), >SysConfig(disk=options.disk_image, mem=options.mem_size)] >+ bm = [SysConfig(disk=options.disk_image, mem=options.mem_size), >+ SysConfig(disk=options.disk_image, mem=options.mem_size)] > else: > bm = [SysConfig(disk=options.disk_image, mem=options.mem_size)] > >_______________________________________________ >gem5-dev mailing list >[email protected] >http://m5sim.org/mailman/listinfo/gem5-dev > -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782 _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
