Hi Everyone,
I was just testing some x87 stuff on a new gem5 version and it seems
like we have a pretty nasty regression. In recent versions of the code
base, it seems like the stack isn't handled correctly. I was able to
bisect down to the offending commit (7274310be1bb, isa: clean up
register constants), which changes ISA constants on Alpha, Mips, SPARC,
and x86.
As far as I can tell, the NumFloatRegs constant is increased by 8, but
Ctrl_Base_DepTag remains constant. I'm not sure how any of this affects
the stack handling though. Could someone with more knowledge of the dark
arts of x86 CPU simulation have a look? Steve?
The test case I used was the following code:
fninit
fldcw fctl_extended
fld1
fldpi
fldpi
...
fctl_extended:
.word 0x037f
These are the results I expect to get (and do get on KVM):
info: FPU registers (XSave):
info: fcw: 0x37f
info: fsw: 0x2800 (top: 5, conditions: , exceptions: )
info: ftwx: 0xe0
info: FP Stack:
info: ST0/5: 0x35c26821a2da0fc90040 (3.14159)
info: ST1/6: 0x35c26821a2da0fc90040 (3.14159)
info: ST2/7: 0x0000000000000080ff3f (1)
On the Atomic CPU I get the following:
info: FPU registers (XSave):
info: fcw: 0x37f
info: fsw: 0x2800 (top: 5, conditions: , exceptions: )
info: ftwx: 0xe0
info: FP Stack:
info: ST0/5: 0x00000000000000000000 (0)
info: ST1/6: 0x00000000000000000000 (0)
info: ST2/7: 0x00000000000000000000 (0)
info: ST3/0: 0x00507721a2da0fc90040 (3.14159) (e)
info: ST4/1: 0x00507721a2da0fc90040 (3.14159) (e)
info: ST5/2: 0x0000000000000080ff3f (1) (e)
//Andreas
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