> On March 13, 2014, 6:05 a.m., Amin Farmahini wrote: > > Sounds good. Out of curiosity, can you mention why these threshold numbers > > are good bulk values?
Good question. As you know it depends on a lot of things. The upper limit is set so that we have enough headroom to not block incoming writes in most "typical" scenarios. The lower limit is set sufficiently high such that we are not too eager in getting rid of writes, and missing out on any spatial locality between sequential requests that are arriving interspersed with requests from other masters. It is mort art than science really... - Andreas ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2193/#review4984 ----------------------------------------------------------- On March 7, 2014, 11:39 p.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2193/ > ----------------------------------------------------------- > > (Updated March 7, 2014, 11:39 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10115:27efc3ce4b53 > --------------------------- > mem: Make DRAM write queue draining more aggressive > > This patch changes the triggering condition for the write draining > such that we grab the opportunity to issue writes if there are no > reads waiting (as opposed to waiting for the writes to reach the high > threshold). As a result, we potentially drain some of the writes in read > idle periods (if any). > > A low threshold is added to be able to control how many write bursts > are kept in the memory controller queue (acting as on-chip storage). > > The high and low thresholds are updated to sensible values for a 32/64 > size write buffer. Note that the thresholds should be adjusted along > with the queue sizes. > > This patch also adds some basic initialisation sanity checks and moves > part of the initialisation to the constructor. > > > Diffs > ----- > > src/mem/SimpleDRAM.py 580b47334a97 > src/mem/simple_dram.hh 580b47334a97 > src/mem/simple_dram.cc 580b47334a97 > > Diff: http://reviews.gem5.org/r/2193/diff/ > > > Testing > ------- > > All regressions pass with stats update > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
