changeset 45a67d84fd4a in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=45a67d84fd4a
description:
cpu: o3: lsq: Fix TSO implementation
This patch fixes violation of TSO in the O3CPU, as all loads must be
ordered with all other loads. In the LQ, if a snoop is observed, all
subsequent loads need to be squashed if the system is TSO.
Prior to this patch, the following case could be violated:
P0 | P1 ;
MOV [x],mail=/usr/spool/mail/nilay | MOV EAX,[y] ;
MOV [y],mail=/usr/spool/mail/nilay | MOV EBX,[x] ;
exists (1:EAX=1 /\ 1:EBX=0) [is a violation]
The problem was found using litmus [http://diy.inria.fr].
Committed by: Nilay Vaish <[email protected]
diffstat:
src/cpu/o3/lsq_unit_impl.hh | 12 ++++++++++--
1 files changed, 10 insertions(+), 2 deletions(-)
diffs (29 lines):
diff -r 4574d5882066 -r 45a67d84fd4a src/cpu/o3/lsq_unit_impl.hh
--- a/src/cpu/o3/lsq_unit_impl.hh Sun Mar 23 11:12:19 2014 -0400
+++ b/src/cpu/o3/lsq_unit_impl.hh Tue Mar 25 13:15:04 2014 -0500
@@ -464,6 +464,8 @@
incrLdIdx(load_idx);
+ bool force_squash = false;
+
while (load_idx != loadTail) {
DynInstPtr ld_inst = loadQueue[load_idx];
@@ -476,8 +478,14 @@
DPRINTF(LSQUnit, "-- inst [sn:%lli] load_addr: %#x to pktAddr:%#x\n",
ld_inst->seqNum, load_addr, invalidate_addr);
- if (load_addr == invalidate_addr) {
- if (ld_inst->possibleLoadViolation()) {
+ if (load_addr == invalidate_addr || force_squash) {
+ if (needsTSO) {
+ // If we have a TSO system, as all loads must be ordered with
+ // all other loads, this load as well as *all* subsequent loads
+ // need to be squashed to prevent possible load reordering.
+ force_squash = true;
+ }
+ if (ld_inst->possibleLoadViolation() || force_squash) {
DPRINTF(LSQUnit, "Conflicting load at addr %#x [sn:%lli]\n",
pkt->getAddr(), ld_inst->seqNum);
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