> On May 1, 2014, 11:20 p.m., Nilay Vaish wrote: > > Where are this two bits? I could not find them in src/arch/arm/miscregs.hh.
Hi Nilay, They are there, perhaps you looked at an older version of gem5 before the armv8 code was merged? Ali - Ali ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2257/#review5070 ----------------------------------------------------------- On April 23, 2014, 12:27 p.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2257/ > ----------------------------------------------------------- > > (Updated April 23, 2014, 12:27 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10209:3b2520f6306c > --------------------------- > arm: allow DC instructions by default so SE mode works > > > Diffs > ----- > > src/arch/arm/isa.cc e40b35147270 > > Diff: http://reviews.gem5.org/r/2257/diff/ > > > Testing > ------- > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
