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Review request for Default. Repository: gem5 Description ------- Changeset 10250:e3ba2b4da10f --------------------------- cpu: Change writeback modeling for outstanding instructions As highlighed on the mailing list gem5's writeback modeling can impact performance. This patch removes the limitation on maximum outstanding issued instructions, however the number that can writeback in a single cycle is still respected in instToCommit(). Diffs ----- configs/common/O3_ARM_v7a.py a2bb75a474fd src/cpu/o3/O3CPU.py a2bb75a474fd src/cpu/o3/iew.hh a2bb75a474fd src/cpu/o3/iew_impl.hh a2bb75a474fd src/cpu/o3/inst_queue_impl.hh a2bb75a474fd src/cpu/o3/lsq_unit.hh a2bb75a474fd src/cpu/o3/lsq_unit_impl.hh a2bb75a474fd Diff: http://reviews.gem5.org/r/2295/diff/ Testing ------- Thanks, Ali Saidi _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
