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Review request for Default. Repository: gem5 Description ------- Changeset 10268:53d5cfcbb5a1 --------------------------- SegInit, x86: Segment initialization to support KvmCPU in SE This patch sets up low and high privilege code and data segments and places them in the following order: cs low, ds low, ds, cs, in the GDT. Additionally, a syscall and page fault handler for KvmCPU in SE mode are defined. The order of the segment selectors in GDT is required in this manner for interrupt handling to work properly. Segment initialization is done for all the thread contexts. Diffs ----- src/arch/x86/process.cc c00b5ba43967e7e48a28b7ddc48c9f4afaf2ab76 src/arch/x86/regs/misc.hh c00b5ba43967e7e48a28b7ddc48c9f4afaf2ab76 src/arch/x86/system.hh c00b5ba43967e7e48a28b7ddc48c9f4afaf2ab76 src/arch/x86/system.cc c00b5ba43967e7e48a28b7ddc48c9f4afaf2ab76 src/sim/Process.py c00b5ba43967e7e48a28b7ddc48c9f4afaf2ab76 src/sim/process.hh c00b5ba43967e7e48a28b7ddc48c9f4afaf2ab76 src/sim/process.cc c00b5ba43967e7e48a28b7ddc48c9f4afaf2ab76 Diff: http://reviews.gem5.org/r/2322/diff/ Testing ------- Quick regression tests Thanks, Alexandru Dutu _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
