changeset 3064e1beeb49 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=3064e1beeb49
description:
        energy: Add the Energy Controller in the right configs

        Tie in the newly created energy controller components in the default
        configurations.

diffstat:

 src/dev/arm/RealView.py |  12 ++++++++++--
 1 files changed, 10 insertions(+), 2 deletions(-)

diffs (85 lines):

diff -r 5eede8466691 -r 3064e1beeb49 src/dev/arm/RealView.py
--- a/src/dev/arm/RealView.py   Sat Sep 20 17:18:23 2014 -0400
+++ b/src/dev/arm/RealView.py   Fri Jul 25 13:36:23 2014 +0100
@@ -51,6 +51,7 @@
 from Uart import Uart
 from SimpleMemory import SimpleMemory
 from Gic import *
+from EnergyCtrl import EnergyCtrl
 
 class AmbaPioDevice(BasicPioDevice):
     type = 'AmbaPioDevice'
@@ -247,6 +248,7 @@
     aaci_fake     = AmbaFake(pio_addr=0x10004000)
     mmc_fake      = AmbaFake(pio_addr=0x10005000)
     rtc           = PL031(pio_addr=0x10017000, int_num=42)
+    energy_ctrl   = EnergyCtrl(pio_addr=0x1000f000)
 
 
     # Attach I/O devices that are on chip and also set the appropriate
@@ -303,6 +305,7 @@
        self.mmc_fake.pio      = bus.master
        self.rtc.pio           = bus.master
        self.flash_fake.pio    = bus.master
+       self.energy_ctrl.pio   = bus.master
 
     # Set the clock domain for IO objects that are considered
     # to be "far" away from the cores.
@@ -331,6 +334,7 @@
         self.mmc_fake.clk_domain      = clkdomain
         self.rtc.clk_domain           = clkdomain
         self.flash_fake.clk_domain    = clkdomain
+        self.energy_ctrl.clk_domain   = clkdomain
 
 # Reference for memory map and interrupt number
 # RealView Emulation Baseboard User Guide (ARM DUI 0143B)
@@ -364,8 +368,7 @@
     aaci_fake     = AmbaFake(pio_addr=0x10004000)
     mmc_fake      = AmbaFake(pio_addr=0x10005000)
     rtc_fake      = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
-
-
+    energy_ctrl   = EnergyCtrl(pio_addr=0x1000f000)
 
     # Attach I/O devices that are on chip and also set the appropriate
     # ranges for the bridge
@@ -413,6 +416,7 @@
        self.rtc_fake.pio      = bus.master
        self.flash_fake.pio    = bus.master
        self.smcreg_fake.pio   = bus.master
+       self.energy_ctrl.pio   = bus.master
 
     # Set the clock domain for IO objects that are considered
     # to be "far" away from the cores.
@@ -441,6 +445,7 @@
         self.rtc.clk_domain           = clkdomain
         self.flash_fake.clk_domain    = clkdomain
         self.smcreg_fake.clk_domain   = clkdomain
+        self.energy_ctrl.clk_domain   = clkdomain
 
 class VExpress_EMM(RealView):
     _mem_regions = [(Addr('2GB'), Addr('2GB'))]
@@ -479,6 +484,7 @@
     lan_fake       = IsaFake(pio_addr=0x1A000000, pio_size=0xffff)
     usb_fake       = IsaFake(pio_addr=0x1B000000, pio_size=0x1ffff)
     mmc_fake       = AmbaFake(pio_addr=0x1c050000)
+    energy_ctrl    = EnergyCtrl(pio_addr=0x1c080000)
 
     # Attach any PCI devices that are supported
     def attachPciDevices(self):
@@ -559,6 +565,7 @@
        self.lan_fake.pio        = bus.master
        self.usb_fake.pio        = bus.master
        self.mmc_fake.pio        = bus.master
+       self.energy_ctrl.pio     = bus.master
 
        # Try to attach the I/O if it exists
        try:
@@ -596,6 +603,7 @@
         self.lan_fake.clk_domain      = clkdomain
         self.usb_fake.clk_domain      = clkdomain
         self.mmc_fake.clk_domain      = clkdomain
+        self.energy_ctrl.clk_domain   = clkdomain
 
 class VExpress_EMM64(VExpress_EMM):
     pci_io_base = 0x2f000000
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