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Review request for Default. Repository: gem5 Description ------- Changeset 10540:4097c5f2fbfa --------------------------- minor: fixed LSQ MasterPortID Minor was reporting the data cache access as ".inst" accesses. This just switches the MasterPortID to dataMasterPortId Diffs ----- src/cpu/minor/lsq.cc 5e0a421e2031 Diff: http://reviews.gem5.org/r/2474/diff/ Testing ------- Thanks, Andrew Lukefahr _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
