changeset 7be879ff600c in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=7be879ff600c
description:
x86: APIC: Only set deliveryStatus if our IPI is going somewhere.
Otherwise the IPI which isn't sent will never arrive, and the
deliveryStatus
bit will never be cleared.
diffstat:
src/arch/x86/interrupts.cc | 14 +++++++-------
1 files changed, 7 insertions(+), 7 deletions(-)
diffs (38 lines):
diff -r 9f100bac04f1 -r 7be879ff600c src/arch/x86/interrupts.cc
--- a/src/arch/x86/interrupts.cc Mon Nov 17 00:17:06 2014 -0800
+++ b/src/arch/x86/interrupts.cc Mon Nov 17 00:19:07 2014 -0800
@@ -491,8 +491,6 @@
}
low = val;
InterruptCommandRegHigh high = regs[APIC_INTERRUPT_COMMAND_HIGH];
- // Record that an IPI is being sent.
- low.deliveryStatus = 1;
TriggerIntMessage message = 0;
message.destination = high.destination;
message.vector = low.vector;
@@ -500,9 +498,6 @@
message.destMode = low.destMode;
message.level = low.level;
message.trigger = low.trigger;
- bool timing(sys->isTimingMode());
- // Be careful no updates of the delivery status bit get lost.
- regs[APIC_INTERRUPT_COMMAND_LOW] = low;
ApicList apics;
int numContexts = sys->numContexts();
switch (low.destShorthand) {
@@ -558,8 +553,13 @@
}
break;
}
- pendingIPIs += apics.size();
- intMasterPort.sendMessage(apics, message, timing);
+ // Record that an IPI is being sent if one actually is.
+ if (apics.size()) {
+ low.deliveryStatus = 1;
+ pendingIPIs += apics.size();
+ }
+ regs[APIC_INTERRUPT_COMMAND_LOW] = low;
+ intMasterPort.sendMessage(apics, message, sys->isTimingMode());
newVal = regs[APIC_INTERRUPT_COMMAND_LOW];
}
break;
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