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Review request for Default. Repository: gem5 Description ------- Changeset 10620:bc791fa6e6dc --------------------------- mem: Ensure DRAM controller is idle when in atomic mode This patch addresses an issue seen with the KVM CPU where the refresh events scheduled by the DRAM controller forces the simulator to switch out of the KVM mode, thus killing performance. The current patch works around the fact that we currently have no proper API to inform a SimObject of the mode switches. Instead we rely on drainResume being called after any switch, and cache the previous mode locally to be able to decide on appropriate actions. The switcheroo regression require a minor stats bump as a result. Diffs ----- src/mem/dram_ctrl.hh 8fc6e7a835d1 src/mem/dram_ctrl.cc 8fc6e7a835d1 Diff: http://reviews.gem5.org/r/2573/diff/ Testing ------- Thanks, Andreas Hansson _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
