changeset 6332c9d471a8 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=6332c9d471a8
description:
mem: Add MemChecker and MemCheckerMonitor
This patch adds the MemChecker and MemCheckerMonitor classes. While
MemChecker can be integrated anywhere in the system and is independent,
the most convenient usage is through the MemCheckerMonitor -- this
however, puts limitations on where the MemChecker is able to observe
read/write transactions.
diffstat:
src/mem/MemChecker.py | 58 ++++
src/mem/SConscript | 7 +
src/mem/mem_checker.cc | 343 ++++++++++++++++++++++++
src/mem/mem_checker.hh | 568 +++++++++++++++++++++++++++++++++++++++++
src/mem/mem_checker_monitor.cc | 374 ++++++++++++++++++++++++++
src/mem/mem_checker_monitor.hh | 240 +++++++++++++++++
6 files changed, 1590 insertions(+), 0 deletions(-)
diffs (truncated from 1624 to 300 lines):
diff -r 3bba9f2d0c7d -r 6332c9d471a8 src/mem/MemChecker.py
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/mem/MemChecker.py Tue Dec 23 09:31:17 2014 -0500
@@ -0,0 +1,58 @@
+# Copyright (c) 2014 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder. You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Marco Elver
+
+from MemObject import MemObject
+from m5.SimObject import SimObject
+from m5.params import *
+from m5.proxy import *
+
+class MemChecker(SimObject):
+ type = 'MemChecker'
+ cxx_header = "mem/mem_checker.hh"
+
+class MemCheckerMonitor(MemObject):
+ type = 'MemCheckerMonitor'
+ cxx_header = "mem/mem_checker_monitor.hh"
+
+ # one port in each direction
+ master = MasterPort("Master port")
+ slave = SlavePort("Slave port")
+ cpu_side = SlavePort("Alias for slave")
+ mem_side = MasterPort("Alias for master")
+ warn_only = Param.Bool(False, "Warn about violations only")
+ memchecker = Param.MemChecker("Instance shared with other monitors")
+
diff -r 3bba9f2d0c7d -r 6332c9d471a8 src/mem/SConscript
--- a/src/mem/SConscript Tue Dec 23 09:31:17 2014 -0500
+++ b/src/mem/SConscript Tue Dec 23 09:31:17 2014 -0500
@@ -79,6 +79,10 @@
Source('dramsim2_wrapper.cc')
Source('dramsim2.cc')
+SimObject('MemChecker.py')
+Source('mem_checker.cc')
+Source('mem_checker_monitor.cc')
+
DebugFlag('AddrRanges')
DebugFlag('BaseXBar')
DebugFlag('CoherentXBar')
@@ -99,3 +103,6 @@
DebugFlag('PacketQueue')
DebugFlag("DRAMSim2")
+
+DebugFlag("MemChecker")
+DebugFlag("MemCheckerMonitor")
diff -r 3bba9f2d0c7d -r 6332c9d471a8 src/mem/mem_checker.cc
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/mem/mem_checker.cc Tue Dec 23 09:31:17 2014 -0500
@@ -0,0 +1,343 @@
+/*
+ * Copyright (c) 2014 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Rune Holm
+ * Marco Elver
+ */
+
+#include <cassert>
+
+#include "mem/mem_checker.hh"
+
+void
+MemChecker::WriteCluster::startWrite(MemChecker::Serial serial, Tick _start,
+ uint8_t data)
+{
+ assert(!isComplete());
+
+ if (start == TICK_FUTURE) {
+ // Initialize a fresh write cluster
+ start = _start;
+ }
+ chatty_assert(start <= _start, "WriteClusters must filled in order!");
+
+ ++numIncomplete;
+
+ if (complete != TICK_FUTURE) {
+ // Reopen a closed write cluster
+ assert(_start < complete); // should open a new write cluster,
instead;
+ // also somewhat fishy wrt causality / ordering of calls vs time
+ // progression TODO: Check me!
+ complete = TICK_FUTURE;
+ }
+
+ // Create new transaction, and denote completion time to be in the future.
+ writes.insert(std::make_pair(serial,
+ MemChecker::Transaction(serial, _start, TICK_FUTURE, data)));
+}
+
+void
+MemChecker::WriteCluster::completeWrite(MemChecker::Serial serial, Tick
_complete)
+{
+ auto it = writes.find(serial);
+
+ if (it == writes.end()) {
+ warn("Could not locate write transaction: serial = %d, complete =
%d\n",
+ serial, _complete);
+ return;
+ }
+
+ // Record completion time of the write
+ assert(it->second.complete == TICK_FUTURE);
+ it->second.complete = _complete;
+
+ // Update max completion time for the cluster
+ if (completeMax < _complete) {
+ completeMax = _complete;
+ }
+
+ if (--numIncomplete == 0) {
+ // All writes have completed, this cluster is now complete and will be
+ // assigned the max of completion tick values among all writes.
+ //
+ // Note that we cannot simply keep updating complete, because that
would
+ // count the cluster as closed already. Instead, we keep TICK_FUTURE
+ // until all writes have completed.
+ complete = completeMax;
+ }
+}
+
+void
+MemChecker::WriteCluster::abortWrite(MemChecker::Serial serial)
+{
+ if (!writes.erase(serial)) {
+ warn("Could not locate write transaction: serial = %d\n", serial);
+ return;
+ }
+
+ if (--numIncomplete == 0 && !writes.empty()) {
+ // This write cluster is now complete, and we can assign the current
+ // completeMax value.
+ complete = completeMax;
+ }
+
+ // Note: this WriteCluster is in pristine state if this was the only
+ // write present; the cluster will get reused through
+ // getIncompleteWriteCluster().
+}
+
+void
+MemChecker::ByteTracker::startRead(MemChecker::Serial serial, Tick start)
+{
+ outstandingReads.insert(std::make_pair(serial,
+ MemChecker::Transaction(serial, start, TICK_FUTURE)));
+}
+
+bool
+MemChecker::ByteTracker::inExpectedData(Tick start, Tick complete, uint8_t
data)
+{
+ _lastExpectedData.clear();
+
+ bool wc_overlap = true;
+
+ // Find the last value read from the location
+ const Transaction& last_obs =
+ *lastCompletedTransaction(&readObservations, start);
+ bool last_obs_valid = (last_obs.complete != TICK_INITIAL);
+
+ // Scan backwards through the write clusters to find the closest younger
+ // preceding & overlapping writes.
+ for (auto cluster = writeClusters.rbegin();
+ cluster != writeClusters.rend() && wc_overlap; ++cluster) {
+ for (const auto& addr_write : cluster->writes) {
+ const Transaction& write = addr_write.second;
+
+ if (write.complete < last_obs.start) {
+ // If this write transaction completed before the last
+ // observation, we ignore it as the last_observation has the
+ // correct value
+ continue;
+ }
+
+ if (write.data == data) {
+ // Found a match, end search.
+ return true;
+ }
+
+ // Record possible, but non-matching data for debugging
+ _lastExpectedData.push_back(write.data);
+
+ if (write.complete > start) {
+ // This write overlapped with the transaction we want to check
+ // -> continue checking the overlapping write cluster
+ continue;
+ }
+
+ // This write cluster has writes that have completed before the
+ // checked transaction. There is no need to check an earlier
+ // write-cluster -> set the exit condition for the outer loop
+ wc_overlap = false;
+
+ if (last_obs.complete < write.start) {
+ // We found a write which started after the last observed read,
+ // therefore we can not longer consider the value seen by the
+ // last observation as a valid expected value.
+ //
+ // Once all writes have been iterated through, we can check if
+ // the last observation is still valid to compare against.
+ last_obs_valid = false;
+ }
+ }
+ }
+
+ // We have not found any matching write, so far; check other sources of
+ // confirmation
+ if (last_obs_valid) {
+ // The last observation is not outdated according to the writes we have
+ // seen so far.
+ assert(last_obs.complete <= start);
+ if (last_obs.data == data) {
+ // Matched data from last observation -> all good
+ return true;
+ }
+ // Record non-matching, but possible value
+ _lastExpectedData.push_back(last_obs.data);
+ }
+
+ if (_lastExpectedData.empty()) {
+ assert(last_obs.complete == TICK_INITIAL);
+ // We have not found any possible (non-matching data). Can happen in
+ // initial system state
+ DPRINTF(MemChecker, "no last observation nor write! start = %d, "\
+ "complete = %d, data = %#x\n", start, complete, data);
+ return true;
+ }
+ return false;
+}
+
+bool
+MemChecker::ByteTracker::completeRead(MemChecker::Serial serial,
+ Tick complete, uint8_t data)
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