Oh, Bummer. I was hoping to be able to get simpoints out of a KvmCPU run. It seems like that is not possible.
Is it possible to generate checkpoints using the KvmCPU? If so, I can run the benchmark once with the kvm, generating checkpoints every N billion instructions. I can then run each of those large samples in parallel to generate the simpoints. There will be some sample redundancy, but that is not a huge concern for me at this point. On Tue, Jan 13, 2015 at 12:11 AM, Andreas Hansson via gem5-dev < [email protected]> wrote: > Hi Mike, > > When you say KVM enabled, I presume you mean running the KvmCPU? As Mitch > points out the problem is that you need something to attach the SimPoint > probe to, and the KvmCPU does not have that functionality. > > Andreas > > On 13/01/2015 00:36, "Mitch Hayenga via gem5-dev" <[email protected]> > wrote: > > >Hi Mike, > > > >I'm the one who wrote the initial version of the simpoint > >collection/generation a few years ago. I enforced the "fastmem" option > >primarily because I didn't see it necessary to simulate caches during > >simpoint generation and it made simulation faster. You can simply disable > >this and it should all still work. > > > >For the "--cpu-type=atomic" option, initially simpoints were hardcoded > >directly into the atomic CPU. Since then, they've been changed to use the > >"probe" system. However, a quick grep of the code shows the > >initialization > >for the SimPoint probe only exists in the atomic CPU. If you registered > >the probe point with the TimingCPU as well, then that should work (I > >think). > > > > > >On Mon, Jan 12, 2015 at 5:02 PM, mike upton via gem5-dev > ><[email protected]> > >wrote: > > > >> I am trying to enable simpoint generation with kvm enabled. > >> > >> Is there anything that inherently blocks this? > >> > >> Simpoints are currently enabled only with --fastmem and > >>--cpu-type=atomic. > >> How fundamental are each of these restrictions? > >> > >> Thanks, > >> > >> Mike > >> _______________________________________________ > >> gem5-dev mailing list > >> [email protected] > >> http://m5sim.org/mailman/listinfo/gem5-dev > >> > >_______________________________________________ > >gem5-dev mailing list > >[email protected] > >http://m5sim.org/mailman/listinfo/gem5-dev > > > > > -- IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended > recipient, please notify the sender immediately and do not disclose the > contents to any other person, use it for any purpose, or store or copy the > information in any medium. Thank you. > > ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, > Registered in England & Wales, Company No: 2557590 > ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, > Registered in England & Wales, Company No: 2548782 > _______________________________________________ > gem5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/gem5-dev > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
