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Review request for Default. Repository: gem5 Description ------- Changeset 10687:e09ee3611a0f --------------------------- arch: Make readMiscRegNoEffect const throughout Finally took the plunge and made this apply to all ISAs, not just ARM. Diffs ----- src/arch/alpha/isa.hh 7639c17357dc src/arch/alpha/isa.cc 7639c17357dc src/arch/mips/isa.hh 7639c17357dc src/arch/mips/isa.cc 7639c17357dc src/arch/power/isa.hh 7639c17357dc src/arch/sparc/isa.hh 7639c17357dc src/arch/sparc/isa.cc 7639c17357dc src/arch/x86/isa.hh 7639c17357dc src/arch/x86/isa.cc 7639c17357dc src/cpu/checker/cpu.hh 7639c17357dc src/cpu/checker/thread_context.hh 7639c17357dc src/cpu/minor/exec_context.hh 7639c17357dc src/cpu/o3/cpu.hh 7639c17357dc src/cpu/o3/cpu.cc 7639c17357dc src/cpu/o3/thread_context.hh 7639c17357dc src/cpu/simple/base.hh 7639c17357dc src/cpu/simple_thread.hh 7639c17357dc src/cpu/thread_context.hh 7639c17357dc Diff: http://reviews.gem5.org/r/2622/diff/ Testing ------- Thanks, Andreas Hansson _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
