----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2629/#review5833 -----------------------------------------------------------
Ship it! Ship It! - Steve Reinhardt On Feb. 5, 2015, 2:59 a.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2629/ > ----------------------------------------------------------- > > (Updated Feb. 5, 2015, 2:59 a.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10692:51ce51ce19d6 > --------------------------- > sim: Move the BaseTLB to src/arch/generic/ > > The TLB-related code is generally architecture dependent and should > live in the arch directory to signify that. > > > Diffs > ----- > > src/arch/alpha/tlb.hh 7639c17357dc > src/arch/arm/stage2_lookup.hh 7639c17357dc > src/arch/arm/tlb.hh 7639c17357dc > src/arch/generic/BaseTLB.py PRE-CREATION > src/arch/generic/SConscript 7639c17357dc > src/arch/generic/tlb.hh PRE-CREATION > src/arch/generic/tlb.cc PRE-CREATION > src/arch/mips/tlb.hh 7639c17357dc > src/arch/power/tlb.hh 7639c17357dc > src/arch/sparc/tlb.hh 7639c17357dc > src/arch/x86/faults.hh 7639c17357dc > src/arch/x86/tlb.hh 7639c17357dc > src/cpu/base_dyn_inst.hh 7639c17357dc > src/cpu/checker/cpu.cc 7639c17357dc > src/cpu/translation.hh 7639c17357dc > src/sim/BaseTLB.py 7639c17357dc > src/sim/SConscript 7639c17357dc > src/sim/tlb.hh 7639c17357dc > src/sim/tlb.cc 7639c17357dc > > Diff: http://reviews.gem5.org/r/2629/diff/ > > > Testing > ------- > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
