-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/2636/#review5885
-----------------------------------------------------------
I have had a similar impulse, when inspecting this code. However, the prefetch
hitting a write-back in an upper cache is actually already handled in
Cache<TagStore>::getTimingPacket():
// Check if the prefetch hit a writeback in an upper cache
// and if so we will eventually get a HardPFResp from
// above
if (snoop_pkt.memInhibitAsserted()) {
// If we are getting a non-shared response it is dirty
bool pending_dirty_resp = !snoop_pkt.sharedAsserted();
markInService(mshr, pending_dirty_resp);
DPRINTF(Cache, "Upward snoop of prefetch for addr"
" %#x (%s) hit\n",
tgt_pkt->getAddr(), tgt_pkt->isSecure()? "s": "ns");
return NULL;
}
We are currently testing a patch that shuffles this thing upwards; we have more
detail tomorrow. In either way, if we want to go with this patch, it should
address this seemingly dead bit of logic, as well. My suggestion is to give
this an additional day, and in the meantime test as Andreas has suggested.
- Stephan Diestelhorst
On Feb. 6, 2015, 12:38 a.m., Steve Reinhardt wrote:
>
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/2636/
> -----------------------------------------------------------
>
> (Updated Feb. 6, 2015, 12:38 a.m.)
>
>
> Review request for Default.
>
>
> Repository: gem5
>
>
> Description
> -------
>
> Changeset 10683:3147f3a868f7
> ---------------------------
> mem: fix prefetcher bug regarding write buffer hits
>
> Prefetches are supposed to be squashed if the block is already
> present in a higher-level cache. We squash appropriately if
> the block is in a higher-level cache or MSHR, but did not
> properly handle the case where the block is in the write buffer.
>
> Thanks to George Michelogiannakis <[email protected]> for
> help in tracking down and testing this fix.
>
>
> Diffs
> -----
>
> src/mem/cache/cache_impl.hh 3d17366c0423a59478ae63d40c8feeea34df218a
>
> Diff: http://reviews.gem5.org/r/2636/diff/
>
>
> Testing
> -------
>
>
> Thanks,
>
> Steve Reinhardt
>
>
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev
