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Ship it! Ship It! - Steve Reinhardt On Feb. 3, 2015, 11:57 a.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2623/ > ----------------------------------------------------------- > > (Updated Feb. 3, 2015, 11:57 a.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10688:dd028a663a72 > --------------------------- > mem: Use the range cache for lookup as well as access > > This patch changes the range cache used in the global physical memory > to be an iterator so that we can use it not only as part of isMemAddr, > but also access and functionalAccess. This matches use-cases where a > core is using the atomic non-caching memory mode, and repeatedly calls > isMemAddr and access. > > Linux boot on aarch32, with a single atomic CPU, is now more than 30% > faster when using "--fastmem" compared to not using the direct memory > access. > > > Diffs > ----- > > src/mem/physical.hh 7639c17357dc > src/mem/physical.cc 7639c17357dc > > Diff: http://reviews.gem5.org/r/2623/diff/ > > > Testing > ------- > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
