> On Feb. 24, 2015, 10:24 p.m., Steve Reinhardt wrote: > > ext/sst/ExtMaster.cc, line 43 > > <http://reviews.gem5.org/r/2667/diff/1/?file=43756#file43756line43> > > > > Why is the ARM license repeated in every file, but the (shorter) Sandia > > license is just included by reference? Seems inconsistent.
Agreed, it is stylistically inconsistent. It's the way they include their license in SST and I didn't think to change it. > On Feb. 24, 2015, 10:24 p.m., Steve Reinhardt wrote: > > ext/sst/Makefile, line 12 > > <http://reviews.gem5.org/r/2667/diff/1/?file=43760#file43760line12> > > > > What if you want to use one of the non-opt builds (like fast or debug)? > > If nothing else, a comment saying that you need to edit this line to do so > > would be nice, even if it's not worth doing something fancier. Good point, I will put a comment / put some verbiage in the documentation. > On Feb. 24, 2015, 10:24 p.m., Steve Reinhardt wrote: > > ext/sst/README, line 1 > > <http://reviews.gem5.org/r/2667/diff/1/?file=43761#file43761line1> > > > > Please include a description here, similar to what's in the commit > > message, so people can know what this is before they're told how to use it > > :). I agree. :) I'll roughly #include the description/commit message into this file. - Curtis ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2667/#review5907 ----------------------------------------------------------- On Feb. 20, 2015, 6:47 p.m., Curtis Dunham wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2667/ > ----------------------------------------------------------- > > (Updated Feb. 20, 2015, 6:47 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10708:344bc6b7203d > --------------------------- > ext: Add SST connector > > This patch adds a connector that allows gem5 to be used as a component > in SST (Structural Simulation Toolkit, sst-simulator.org). At a high > level, this allows memory traffic to pass between the two simulators. > SST Links are roughly analogous to gem5 Ports, although Links do not > have a notion of master and slave. This distinction is important to > gem5, so when connecting a gem5 CPU to an SST cache, an ExternalSlave > must be used, and similarly when connecting the memory side of SST cache > to a gem5 port (for memory <-> I/O), an ExternalMaster must be used. > > These connectors handle the administrative aspects of gem5 > (initialization, simulation, shutdown) as well as translating SST's > MemEvents into gem5 Packets and vice-versa. > > > Diffs > ----- > > ext/sst/ExtMaster.hh PRE-CREATION > ext/sst/ExtMaster.cc PRE-CREATION > ext/sst/ExtSlave.hh PRE-CREATION > ext/sst/ExtSlave.cc PRE-CREATION > ext/sst/LICENSE PRE-CREATION > ext/sst/Makefile PRE-CREATION > ext/sst/README PRE-CREATION > ext/sst/gem5.hh PRE-CREATION > ext/sst/gem5.cc PRE-CREATION > ext/sst/libgem5.cc PRE-CREATION > > Diff: http://reviews.gem5.org/r/2667/diff/ > > > Testing > ------- > > > Thanks, > > Curtis Dunham > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
