changeset 60482901c996 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=60482901c996
description:
        cpu: o3: commit: mark pipeline delay variable as consts

diffstat:

 src/cpu/o3/commit.hh |  16 ++++++++--------
 1 files changed, 8 insertions(+), 8 deletions(-)

diffs (49 lines):

diff -r 17c5d36dfdac -r 60482901c996 src/cpu/o3/commit.hh
--- a/src/cpu/o3/commit.hh      Mon Mar 09 09:39:08 2015 -0500
+++ b/src/cpu/o3/commit.hh      Mon Mar 09 09:39:08 2015 -0500
@@ -406,29 +406,29 @@
     std::list<ThreadID> priority_list;
 
     /** IEW to Commit delay. */
-    Cycles iewToCommitDelay;
+    const Cycles iewToCommitDelay;
 
     /** Commit to IEW delay. */
-    Cycles commitToIEWDelay;
+    const Cycles commitToIEWDelay;
 
     /** Rename to ROB delay. */
-    Cycles renameToROBDelay;
+    const Cycles renameToROBDelay;
 
-    Cycles fetchToCommitDelay;
+    const Cycles fetchToCommitDelay;
 
     /** Rename width, in instructions.  Used so ROB knows how many
      *  instructions to get from the rename instruction queue.
      */
-    unsigned renameWidth;
+    const unsigned renameWidth;
 
     /** Commit width, in instructions. */
-    unsigned commitWidth;
+    const unsigned commitWidth;
 
     /** Number of Reorder Buffers */
     unsigned numRobs;
 
     /** Number of Active Threads */
-    ThreadID numThreads;
+    const ThreadID numThreads;
 
     /** Is a drain pending? Commit is looking for an instruction boundary while
      * there are no pending interrupts
@@ -445,7 +445,7 @@
     /** The latency to handle a trap.  Used when scheduling trap
      * squash event.
      */
-    Cycles trapLatency;
+    const Cycles trapLatency;
 
     /** The interrupt fault. */
     Fault interrupt;
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