changeset 48a72150f82c in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=48a72150f82c
description:
stats: update Minor stats due to PF bug fix
A recent changeset of mine (http://repo.gem5.org/gem5/rev/4cfe55719da5)
inadvertently fixed a bug in the Minor CPU model which caused it to
treat
software prefetches as regular loads. Prior to this changeset, Minor
did an ad-hoc generation of memory commands that left out the PF check;
because it now uses the common code that the other CPU models use,
it generates prefetches properly. These stat changes reflect the fact
that the Minor model now issues SoftPFReqs.
diffstat:
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/config.ini
| 113 +-
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/simout
| 18 +-
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/stats.txt
| 4386 ++++----
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/system.terminal
| Bin
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/config.ini
| 43 +-
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/simout
| 16 +-
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/stats.txt
| 1679 +-
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/system.terminal
| Bin
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/config.ini
| 113 +-
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/simout
| 18 +-
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/stats.txt
| 4902 +++++----
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/system.terminal
| Bin
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/config.ini
| 43 +-
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/simout
| 16 +-
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/stats.txt
| 1955 ++-
tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/system.terminal
| Bin
tests/long/se/10.mcf/ref/arm/linux/minor-timing/config.ini
| 25 +-
tests/long/se/10.mcf/ref/arm/linux/minor-timing/simerr
| 1 +
tests/long/se/10.mcf/ref/arm/linux/minor-timing/simout
| 14 +-
tests/long/se/10.mcf/ref/arm/linux/minor-timing/stats.txt
| 582 +-
tests/long/se/20.parser/ref/arm/linux/minor-timing/config.ini
| 25 +-
tests/long/se/20.parser/ref/arm/linux/minor-timing/simerr
| 1 +
tests/long/se/20.parser/ref/arm/linux/minor-timing/simout
| 14 +-
tests/long/se/20.parser/ref/arm/linux/minor-timing/stats.txt
| 942 +-
tests/long/se/30.eon/ref/arm/linux/minor-timing/config.ini
| 30 +-
tests/long/se/30.eon/ref/arm/linux/minor-timing/simerr
| 1 +
tests/long/se/30.eon/ref/arm/linux/minor-timing/simout
| 16 +-
tests/long/se/30.eon/ref/arm/linux/minor-timing/stats.txt
| 426 +-
tests/long/se/40.perlbmk/ref/arm/linux/minor-timing/config.ini
| 30 +-
tests/long/se/40.perlbmk/ref/arm/linux/minor-timing/simerr
| 1 +
tests/long/se/40.perlbmk/ref/arm/linux/minor-timing/simout
| 2028 +--
tests/long/se/40.perlbmk/ref/arm/linux/minor-timing/stats.txt
| 340 +-
tests/long/se/50.vortex/ref/arm/linux/minor-timing/config.ini
| 30 +-
tests/long/se/50.vortex/ref/arm/linux/minor-timing/simerr
| 1 +
tests/long/se/50.vortex/ref/arm/linux/minor-timing/simout
| 14 +-
tests/long/se/50.vortex/ref/arm/linux/minor-timing/stats.txt
| 1031 +-
tests/long/se/60.bzip2/ref/arm/linux/minor-timing/config.ini
| 30 +-
tests/long/se/60.bzip2/ref/arm/linux/minor-timing/simerr
| 1 +
tests/long/se/60.bzip2/ref/arm/linux/minor-timing/simout
| 14 +-
tests/long/se/60.bzip2/ref/arm/linux/minor-timing/stats.txt
| 320 +-
tests/long/se/70.twolf/ref/arm/linux/minor-timing/config.ini
| 30 +-
tests/long/se/70.twolf/ref/arm/linux/minor-timing/simerr
| 1 +
tests/long/se/70.twolf/ref/arm/linux/minor-timing/simout
| 14 +-
tests/long/se/70.twolf/ref/arm/linux/minor-timing/stats.txt
| 346 +-
44 files changed, 9635 insertions(+), 9975 deletions(-)
diffs (truncated from 24142 to 300 lines):
diff -r 62b24818c8c6 -r 48a72150f82c
tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/config.ini
--- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/config.ini
Thu Mar 19 04:06:21 2015 -0400
+++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/config.ini
Thu Mar 19 08:41:32 2015 -0400
@@ -12,12 +12,12 @@
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl
iobus iocache l2c membus physmem realview terminal toL2Bus vncserver
voltage_domain
atags_addr=134217728
-boot_loader=/dist/binaries/boot_emm.arm
+boot_loader=/dist/m5/system/binaries/boot_emm.arm
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480
norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
boot_release_addr=65528
cache_line_size=64
clk_domain=system.clk_domain
-dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
+dtb_filename=/dist/m5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
@@ -30,20 +30,21 @@
have_virtualization=false
highest_el_is_64=false
init_param=0
-kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
+kernel=/dist/m5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
machine_type=VExpress_EMM
mem_mode=timing
mem_ranges=2147483648:2415919103
-memories=system.realview.nvmem system.physmem system.realview.vram
+memories=system.physmem system.realview.nvmem system.realview.vram
+mmap_using_noreserve=false
multi_proc=true
num_work_ids=16
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
-readfile=/work/gem5.ext/tests/halt.sh
+readfile=/z/stever/hg/gem5/tests/halt.sh
reset_addr_64=0
symbolfile=
work_begin_ckpt_count=0
@@ -86,7 +87,7 @@
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
-image_file=/dist/disks/linux-aarch32-ael.img
+image_file=/dist/m5/system/disks/linux-aarch32-ael.img
read_only=true
[system.clk_domain]
@@ -186,6 +187,7 @@
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
hit_latency=2
@@ -220,6 +222,7 @@
children=stage2_tlb
eventq_index=0
stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb
+sys=system
tlb=system.cpu0.dtb
[system.cpu0.dstage2_mmu.stage2_tlb]
@@ -237,7 +240,6 @@
is_stage2=true
num_squash_per_cycle=2
sys=system
-port=system.cpu0.toL2Bus.slave[5]
[system.cpu0.dtb]
type=ArmTLB
@@ -645,6 +647,7 @@
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
hit_latency=1
@@ -713,6 +716,7 @@
children=stage2_tlb
eventq_index=0
stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb
+sys=system
tlb=system.cpu0.itb
[system.cpu0.istage2_mmu.stage2_tlb]
@@ -730,7 +734,6 @@
is_stage2=true
num_squash_per_cycle=2
sys=system
-port=system.cpu0.toL2Bus.slave[4]
[system.cpu0.itb]
type=ArmTLB
@@ -755,6 +758,7 @@
addr_ranges=0:18446744073709551615
assoc=16
clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
hit_latency=12
@@ -776,19 +780,27 @@
[system.cpu0.l2cache.prefetcher]
type=StridePrefetcher
+cache_snoop=false
clk_domain=system.cpu_clk_domain
-cross_pages=false
-data_accesses_only=false
degree=8
eventq_index=0
-inst_tagged=true
latency=1
-on_miss_only=false
-on_prefetch=true
-on_read_only=false
-serial_squash=false
-size=100
+max_conf=7
+min_conf=0
+on_data=true
+on_inst=true
+on_miss=false
+on_read=true
+on_write=true
+queue_filter=true
+queue_size=32
+queue_squash=true
+start_conf=4
sys=system
+table_assoc=4
+table_sets=16
+tag_prefetch=true
+thresh_conf=4
use_master_id=true
[system.cpu0.l2cache.tags]
@@ -805,13 +817,16 @@
type=CoherentXBar
clk_domain=system.cpu_clk_domain
eventq_index=0
-header_cycles=1
+forward_latency=0
+frontend_latency=1
+response_latency=1
snoop_filter=Null
+snoop_response_latency=1
system=system
use_default_range=false
width=32
master=system.cpu0.l2cache.cpu_side
-slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side
system.cpu0.itb.walker.port system.cpu0.dtb.walker.port
system.cpu0.istage2_mmu.stage2_tlb.walker.port
system.cpu0.dstage2_mmu.stage2_tlb.walker.port
+slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side
system.cpu0.itb.walker.port system.cpu0.dtb.walker.port
[system.cpu0.tracer]
type=ExeTracer
@@ -906,6 +921,7 @@
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
hit_latency=2
@@ -940,6 +956,7 @@
children=stage2_tlb
eventq_index=0
stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb
+sys=system
tlb=system.cpu1.dtb
[system.cpu1.dstage2_mmu.stage2_tlb]
@@ -957,7 +974,6 @@
is_stage2=true
num_squash_per_cycle=2
sys=system
-port=system.cpu1.toL2Bus.slave[5]
[system.cpu1.dtb]
type=ArmTLB
@@ -1365,6 +1381,7 @@
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
hit_latency=1
@@ -1433,6 +1450,7 @@
children=stage2_tlb
eventq_index=0
stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb
+sys=system
tlb=system.cpu1.itb
[system.cpu1.istage2_mmu.stage2_tlb]
@@ -1450,7 +1468,6 @@
is_stage2=true
num_squash_per_cycle=2
sys=system
-port=system.cpu1.toL2Bus.slave[4]
[system.cpu1.itb]
type=ArmTLB
@@ -1475,6 +1492,7 @@
addr_ranges=0:18446744073709551615
assoc=16
clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
hit_latency=12
@@ -1496,19 +1514,27 @@
[system.cpu1.l2cache.prefetcher]
type=StridePrefetcher
+cache_snoop=false
clk_domain=system.cpu_clk_domain
-cross_pages=false
-data_accesses_only=false
degree=8
eventq_index=0
-inst_tagged=true
latency=1
-on_miss_only=false
-on_prefetch=true
-on_read_only=false
-serial_squash=false
-size=100
+max_conf=7
+min_conf=0
+on_data=true
+on_inst=true
+on_miss=false
+on_read=true
+on_write=true
+queue_filter=true
+queue_size=32
+queue_squash=true
+start_conf=4
sys=system
+table_assoc=4
+table_sets=16
+tag_prefetch=true
+thresh_conf=4
use_master_id=true
[system.cpu1.l2cache.tags]
@@ -1525,13 +1551,16 @@
type=CoherentXBar
clk_domain=system.cpu_clk_domain
eventq_index=0
-header_cycles=1
+forward_latency=0
+frontend_latency=1
+response_latency=1
snoop_filter=Null
+snoop_response_latency=1
system=system
use_default_range=false
width=32
master=system.cpu1.l2cache.cpu_side
-slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
system.cpu1.itb.walker.port system.cpu1.dtb.walker.port
system.cpu1.istage2_mmu.stage2_tlb.walker.port
system.cpu1.dstage2_mmu.stage2_tlb.walker.port
+slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
system.cpu1.itb.walker.port system.cpu1.dtb.walker.port
[system.cpu1.tracer]
type=ExeTracer
@@ -1562,9 +1591,11 @@
type=NoncoherentXBar
clk_domain=system.clk_domain
eventq_index=0
-header_cycles=1
+forward_latency=1
+frontend_latency=2
+response_latency=2
use_default_range=true
-width=8
+width=16
default=system.realview.pciconfig.pio
master=system.realview.uart.pio system.realview.realview_io.pio
system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio
system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio
system.realview.cf_ctrl.pio system.realview.cf_ctrl.config
system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio
system.realview.uart1_fake.pio system.realview.uart2_fake.pio
system.realview.uart3_fake.pio system.realview.sp810_fake.pio
system.realview.watchdog_fake.pio system.realview.aaci_fake.pio
system.realview.lan_fake.pio system.realview.usb_fake.pio
system.realview.mmc_fake.pio system.realview.energy_ctrl.pio
system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio
system.realview.ethernet.config system.iocache.cpu_side
slave=system.bridge.master system.realview.clcd.dma
system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
@@ -1575,6 +1606,7 @@
addr_ranges=2147483648:2415919103
assoc=8
clk_domain=system.clk_domain
+demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
hit_latency=50
@@ -1610,6 +1642,7 @@
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
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