> On March 31, 2015, 5:34 a.m., Steve Reinhardt wrote: > > I was initially slightly uneasy that, in the timing case, the sharing > > information could be out of date, as the cpu_pkt has been buffered in the > > MSHR for an indeterminate amount of time. I doubt there's any harm in > > conservatively assuming the block to still be shared even in the (rare) > > case that it no longer is, though, so I convinced myself that it's OK.
I'll elaborate on this in the code comments. - Andreas ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2715/#review5993 ----------------------------------------------------------- On March 30, 2015, 9:17 a.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2715/ > ----------------------------------------------------------- > > (Updated March 30, 2015, 9:17 a.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10781:06996c41b263 > --------------------------- > mem: Pass shared downstream through caches > > This patch ensures that we pass on information about a packet being > shared (rather than exclusive), when forwarding a packet downstream. > > Without this patch there is a risk that a downstream cache considers > the line exclusive when it really isn't. > > > Diffs > ----- > > src/mem/cache/cache_impl.hh 8a7285d6197e > > Diff: http://reviews.gem5.org/r/2715/diff/ > > > Testing > ------- > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
