> On April 13, 2015, 9:16 a.m., Steve Reinhardt wrote: > > We should probably solicit a 'Ship It' from Korey just so he can have some > > closure... :)
Never mind... I hadn't noticed until now that he had already replied via email. Closure achieved! - Steve ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2704/#review6039 ----------------------------------------------------------- On March 24, 2015, 8:50 a.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2704/ > ----------------------------------------------------------- > > (Updated March 24, 2015, 8:50 a.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10782:7d705e6bc0f4 > --------------------------- > cpu: Remove the InOrderCPU from the tree > > This patch takes the final step in removing the InOrderCPU from the > tree. Rest in peace. > > The MinorCPU is now used to model an in-order microarchitecture, and > long term the MinorCPU will eventually be renamed InOrderCPU. > > > Diffs > ----- > > src/cpu/inorder/inorder_dyn_inst.cc 8f5993cfa916 > src/cpu/inorder/inorder_trace.hh 8f5993cfa916 > src/cpu/inorder/inorder_trace.cc 8f5993cfa916 > src/cpu/inorder/pipeline_stage.hh 8f5993cfa916 > src/cpu/inorder/pipeline_stage.cc 8f5993cfa916 > src/cpu/inorder/inorder_dyn_inst.hh 8f5993cfa916 > src/cpu/inorder/SConsopts 8f5993cfa916 > src/cpu/inorder/comm.hh 8f5993cfa916 > src/cpu/inorder/cpu.hh 8f5993cfa916 > src/cpu/inorder/cpu.cc 8f5993cfa916 > src/cpu/inorder/first_stage.hh 8f5993cfa916 > src/cpu/inorder/first_stage.cc 8f5993cfa916 > src/cpu/inorder/inorder_cpu_builder.cc 8f5993cfa916 > src/cpu/inorder/InOrderCPU.py 8f5993cfa916 > src/cpu/inorder/InOrderTrace.py 8f5993cfa916 > src/cpu/inorder/SConscript 8f5993cfa916 > src/cpu/inorder/resources/use_def.cc 8f5993cfa916 > src/cpu/inorder/thread_context.hh 8f5993cfa916 > src/cpu/inorder/thread_context.cc 8f5993cfa916 > src/cpu/inorder/thread_state.hh 8f5993cfa916 > src/cpu/inorder/thread_state.cc 8f5993cfa916 > src/cpu/inorder/resource_pool.hh 8f5993cfa916 > src/cpu/inorder/resource_pool.cc 8f5993cfa916 > src/cpu/inorder/resource_sked.hh 8f5993cfa916 > src/cpu/inorder/resource_sked.cc 8f5993cfa916 > src/cpu/inorder/resources/agen_unit.hh 8f5993cfa916 > src/cpu/inorder/resources/agen_unit.cc 8f5993cfa916 > src/cpu/inorder/resources/branch_predictor.hh 8f5993cfa916 > src/cpu/inorder/resources/branch_predictor.cc 8f5993cfa916 > src/cpu/inorder/resources/cache_unit.hh 8f5993cfa916 > src/cpu/inorder/resources/cache_unit.cc 8f5993cfa916 > src/cpu/inorder/resources/decode_unit.hh 8f5993cfa916 > src/cpu/inorder/resources/decode_unit.cc 8f5993cfa916 > src/cpu/inorder/resources/execution_unit.hh 8f5993cfa916 > src/cpu/inorder/resources/execution_unit.cc 8f5993cfa916 > src/cpu/inorder/resources/fetch_seq_unit.hh 8f5993cfa916 > src/cpu/inorder/resources/fetch_seq_unit.cc 8f5993cfa916 > src/cpu/inorder/resources/fetch_unit.hh 8f5993cfa916 > src/cpu/inorder/resources/fetch_unit.cc 8f5993cfa916 > src/cpu/inorder/resources/graduation_unit.hh 8f5993cfa916 > src/cpu/inorder/resources/graduation_unit.cc 8f5993cfa916 > src/cpu/inorder/resources/inst_buffer.hh 8f5993cfa916 > src/cpu/inorder/resources/inst_buffer.cc 8f5993cfa916 > src/cpu/inorder/resources/mem_dep_unit.hh 8f5993cfa916 > src/cpu/inorder/resources/mult_div_unit.hh 8f5993cfa916 > src/cpu/inorder/resources/mult_div_unit.cc 8f5993cfa916 > src/cpu/inorder/resources/resource_list.hh 8f5993cfa916 > src/cpu/inorder/resources/tlb_unit.hh 8f5993cfa916 > src/cpu/inorder/resources/tlb_unit.cc 8f5993cfa916 > src/cpu/inorder/resources/use_def.hh 8f5993cfa916 > src/cpu/inorder/pipeline_traits.5stage.cc 8f5993cfa916 > src/cpu/inorder/pipeline_traits.9stage.hh 8f5993cfa916 > src/cpu/inorder/pipeline_traits.9stage.cc 8f5993cfa916 > src/cpu/inorder/pipeline_traits.9stage.smt2.hh 8f5993cfa916 > src/cpu/inorder/pipeline_traits.9stage.smt2.cc 8f5993cfa916 > src/cpu/inorder/pipeline_traits.hh 8f5993cfa916 > src/cpu/inorder/reg_dep_map.hh 8f5993cfa916 > src/cpu/inorder/reg_dep_map.cc 8f5993cfa916 > src/cpu/inorder/resource.hh 8f5993cfa916 > src/cpu/inorder/resource.cc 8f5993cfa916 > src/cpu/inorder/resource_pool.9stage.cc 8f5993cfa916 > src/cpu/inorder/pipeline_traits.5stage.hh 8f5993cfa916 > > Diff: http://reviews.gem5.org/r/2704/diff/ > > > Testing > ------- > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
