changeset e2a283400c43 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=e2a283400c43
description:
arch, cpu: Do not forward snoops to table walker
This patch simplifies the overall CPU by changing the TLB caches such
that they do not forward snoops to the table walker port(s). Note that
only ARM and X86 are affected.
There is no reason for the ports to snoop as they do not actually take
any action, and from a performance point of view we are better of not
snooping more than we have to.
Should it at a later point be required to snoop for a particular TLB
design it is easy enough to add it back.
diffstat:
configs/common/Caches.py | 1 +
configs/common/O3_ARM_v7a.py | 2 +-
src/arch/arm/stage2_mmu.hh | 34 +---------------------------------
src/arch/x86/pagetable_walker.hh | 8 --------
4 files changed, 3 insertions(+), 42 deletions(-)
diffs (85 lines):
diff -r 2e8abe3bbe32 -r e2a283400c43 configs/common/Caches.py
--- a/configs/common/Caches.py Tue May 05 03:22:26 2015 -0400
+++ b/configs/common/Caches.py Tue May 05 03:22:27 2015 -0400
@@ -79,4 +79,5 @@
mshrs = 10
size = '1kB'
tgts_per_mshr = 12
+ forward_snoops = False
is_top_level = True
diff -r 2e8abe3bbe32 -r e2a283400c43 configs/common/O3_ARM_v7a.py
--- a/configs/common/O3_ARM_v7a.py Tue May 05 03:22:26 2015 -0400
+++ b/configs/common/O3_ARM_v7a.py Tue May 05 03:22:27 2015 -0400
@@ -174,7 +174,7 @@
assoc = 8
write_buffers = 16
is_top_level = True
-
+ forward_snoops = False
# L2 Cache
class O3_ARM_v7aL2(BaseCache):
diff -r 2e8abe3bbe32 -r e2a283400c43 src/arch/arm/stage2_mmu.hh
--- a/src/arch/arm/stage2_mmu.hh Tue May 05 03:22:26 2015 -0400
+++ b/src/arch/arm/stage2_mmu.hh Tue May 05 03:22:27 2015 -0400
@@ -57,40 +57,8 @@
protected:
- /**
- * A snooping DMA port that currently does nothing besides
- * extending the DMA port to accept snoops without
- * complaining. Currently we take no action on any snoops.
- */
- class SnoopingDmaPort : public DmaPort
- {
-
- protected:
-
- virtual void recvTimingSnoopReq(PacketPtr pkt)
- { }
-
- virtual Tick recvAtomicSnoop(PacketPtr pkt)
- { return 0; }
-
- virtual void recvFunctionalSnoop(PacketPtr pkt)
- { }
-
- virtual bool isSnooping() const { return true; }
-
- public:
-
- /**
- * A snooping DMA port merely calls the construtor of the DMA
- * port.
- */
- SnoopingDmaPort(MemObject *dev, System *s) :
- DmaPort(dev, s)
- { }
- };
-
/** Port to issue translation requests from */
- SnoopingDmaPort port;
+ DmaPort port;
/** Request id for requests generated by this MMU */
MasterID masterId;
diff -r 2e8abe3bbe32 -r e2a283400c43 src/arch/x86/pagetable_walker.hh
--- a/src/arch/x86/pagetable_walker.hh Tue May 05 03:22:26 2015 -0400
+++ b/src/arch/x86/pagetable_walker.hh Tue May 05 03:22:27 2015 -0400
@@ -70,15 +70,7 @@
Walker *walker;
bool recvTimingResp(PacketPtr pkt);
-
- /**
- * Snooping a coherence request, do nothing.
- */
- void recvTimingSnoopReq(PacketPtr pkt) { }
- Tick recvAtomicSnoop(PacketPtr pkt) { return 0; }
- void recvFunctionalSnoop(PacketPtr pkt) { }
void recvReqRetry();
- bool isSnooping() const { return true; }
};
friend class WalkerPort;
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