changeset d02b45a554b5 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=d02b45a554b5
description:
        arm: implement the CONTEXTIDR_EL2 system reg.

diffstat:

 src/arch/arm/miscregs.cc |   4 ++++
 src/arch/arm/miscregs.hh |  18 ++++++++++--------
 2 files changed, 14 insertions(+), 8 deletions(-)

diffs (64 lines):

diff -r 117db3a0d78c -r d02b45a554b5 src/arch/arm/miscregs.cc
--- a/src/arch/arm/miscregs.cc  Tue May 26 03:21:44 2015 -0400
+++ b/src/arch/arm/miscregs.cc  Tue May 26 03:21:45 2015 -0400
@@ -1334,6 +1334,8 @@
     bitset<NUM_MISCREG_INFOS>(string("11111111110000000100")),
     // MISCREG_CBAR_EL1
     bitset<NUM_MISCREG_INFOS>(string("01010101010000000001")),
+    // MISCREG_CONTEXTIDR_EL2
+    bitset<NUM_MISCREG_INFOS>(string("11111100000000000001")),
 
     // Dummy registers
     // MISCREG_NOP
@@ -3343,6 +3345,8 @@
                 switch (crm) {
                   case 0:
                     switch (op2) {
+                      case 1:
+                        return MISCREG_CONTEXTIDR_EL2;
                       case 2:
                         return MISCREG_TPIDR_EL2;
                     }
diff -r 117db3a0d78c -r d02b45a554b5 src/arch/arm/miscregs.hh
--- a/src/arch/arm/miscregs.hh  Tue May 26 03:21:44 2015 -0400
+++ b/src/arch/arm/miscregs.hh  Tue May 26 03:21:45 2015 -0400
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010-2014 ARM Limited
+ * Copyright (c) 2010-2015 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -663,16 +663,17 @@
         MISCREG_CPUMERRSR_EL1,          // 596
         MISCREG_L2MERRSR_EL1,           // 597
         MISCREG_CBAR_EL1,               // 598
+        MISCREG_CONTEXTIDR_EL2,         // 599
 
         // Dummy registers
-        MISCREG_NOP,                    // 599
-        MISCREG_RAZ,                    // 600
-        MISCREG_CP14_UNIMPL,            // 601
-        MISCREG_CP15_UNIMPL,            // 602
-        MISCREG_A64_UNIMPL,             // 603
-        MISCREG_UNKNOWN,                // 604
+        MISCREG_NOP,                    // 600
+        MISCREG_RAZ,                    // 601
+        MISCREG_CP14_UNIMPL,            // 602
+        MISCREG_CP15_UNIMPL,            // 603
+        MISCREG_A64_UNIMPL,             // 604
+        MISCREG_UNKNOWN,                // 605
 
-        NUM_MISCREGS                    // 605
+        NUM_MISCREGS                    // 606
     };
 
     enum MiscRegInfo {
@@ -1344,6 +1345,7 @@
         "cpumerrsr_el1",
         "l2merrsr_el1",
         "cbar_el1",
+        "contextidr_el2",
 
         // Dummy registers
         "nop",
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