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(Updated May 28, 2015, 7:02 p.m.) Review request for Default. Changes ------- Solved the first 2 issues Joel raised. Repository: gem5 Description (updated) ------- Changeset 10857:5dd0809b9662 --------------------------- cpu: o3: Merging haltContext with suspendContext This patch improves suspendContext by flushing the pipeline, which frees resources for other hardware threads. Secondly, it makes haltContext call suspendContext which is not freeing architectural registers mappings on halt. Something that haltContext previously did and was not realistic. For example, in SMT implementations the architectural registers for a particular hardware thread will always have mapped some physical registers and having one thread finish execution will never create more available physical registers for other hardware threads as there will be scheduled a different software thread to execute on that hardware thread anyway. As a consequence, this patch helps enabling SMT in x86 by not putting the physical registered mapped to the ZeroRegister on the freeList for a different thread to pick up when one of the threads has finished executing and called exit. Diffs (updated) ----- src/arch/x86/isa/microops/specop.isa d02b45a554b52c68cce41e1b3895fb8582a639dd src/cpu/o3/cpu.hh d02b45a554b52c68cce41e1b3895fb8582a639dd src/cpu/o3/cpu.cc d02b45a554b52c68cce41e1b3895fb8582a639dd src/cpu/o3/decode_impl.hh d02b45a554b52c68cce41e1b3895fb8582a639dd src/cpu/o3/fetch_impl.hh d02b45a554b52c68cce41e1b3895fb8582a639dd Diff: http://reviews.gem5.org/r/2846/diff/ Testing ------- Quick regressions passed. Thanks, Alexandru Dutu _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
