changeset 8cfa8dac39fe in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=8cfa8dac39fe
description:
stats: x86: update stats missed out on in preivous changeset
diffstat:
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini
| 92 +-
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/system.pc.com_1.terminal
| 4 +-
tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.ini
| 82 +-
tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/simerr
| 52 +-
tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/system.pc.com_1.terminal
| 4 +-
tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini
| 79 +-
tests/long/se/10.mcf/ref/x86/linux/simple-timing/config.ini
| 22 +-
tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini
| 79 +-
tests/long/se/20.parser/ref/x86/linux/o3-timing/simout
| 36 +-
tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt
| 1520 +++++-----
tests/long/se/20.parser/ref/x86/linux/simple-atomic/config.ini
| 8 +-
tests/long/se/20.parser/ref/x86/linux/simple-timing/config.ini
| 22 +-
tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/config.ini
| 8 +-
tests/long/se/60.bzip2/ref/x86/linux/simple-timing/config.ini
| 22 +-
tests/long/se/70.twolf/ref/x86/linux/o3-timing/config.ini
| 79 +-
tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini
| 22 +-
tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini
| 22 +-
tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini
| 79 +-
tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini
| 9 +-
tests/quick/se/10.mcf/ref/x86/linux/simple-atomic/config.ini
| 10 +-
tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/config.ini
| 10 +-
tests/quick/se/70.twolf/ref/x86/linux/simple-timing/config.ini
| 24 +-
22 files changed, 1141 insertions(+), 1144 deletions(-)
diffs (truncated from 4887 to 300 lines):
diff -r ac6617bf9967 -r 8cfa8dac39fe
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini
--- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini Sat Jul
04 10:43:47 2015 -0500
+++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini Sun Jul
05 20:26:18 2015 -0500
@@ -211,7 +211,7 @@
eventq_index=0
forward_snoops=true
hit_latency=2
-is_top_level=true
+is_read_only=false
max_miss_count=0
mshrs=4
prefetch_on_access=false
@@ -222,7 +222,6 @@
system=system
tags=system.cpu.dcache.tags
tgts_per_mshr=20
-two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
@@ -260,9 +259,9 @@
clk_domain=system.cpu_clk_domain
demand_mshr_reserve=1
eventq_index=0
-forward_snoops=true
+forward_snoops=false
hit_latency=2
-is_top_level=true
+is_read_only=false
max_miss_count=0
mshrs=10
prefetch_on_access=false
@@ -273,7 +272,6 @@
system=system
tags=system.cpu.dtb_walker_cache.tags
tgts_per_mshr=12
-two_queue=false
write_buffers=8
cpu_side=system.cpu.dtb.walker.port
mem_side=system.cpu.toL2Bus.slave[3]
@@ -304,9 +302,9 @@
[system.cpu.fuPool.FUList0.opList]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=IntAlu
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList1]
type=FUDesc
@@ -318,16 +316,16 @@
[system.cpu.fuPool.FUList1.opList0]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=IntMult
opLat=3
+pipelined=true
[system.cpu.fuPool.FUList1.opList1]
type=OpDesc
eventq_index=0
-issueLat=19
opClass=IntDiv
-opLat=20
+opLat=1
+pipelined=false
[system.cpu.fuPool.FUList2]
type=FUDesc
@@ -339,23 +337,23 @@
[system.cpu.fuPool.FUList2.opList0]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=FloatAdd
opLat=2
+pipelined=true
[system.cpu.fuPool.FUList2.opList1]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=FloatCmp
opLat=2
+pipelined=true
[system.cpu.fuPool.FUList2.opList2]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=FloatCvt
opLat=2
+pipelined=true
[system.cpu.fuPool.FUList3]
type=FUDesc
@@ -367,23 +365,23 @@
[system.cpu.fuPool.FUList3.opList0]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=FloatMult
opLat=4
+pipelined=true
[system.cpu.fuPool.FUList3.opList1]
type=OpDesc
eventq_index=0
-issueLat=12
opClass=FloatDiv
opLat=12
+pipelined=false
[system.cpu.fuPool.FUList3.opList2]
type=OpDesc
eventq_index=0
-issueLat=24
opClass=FloatSqrt
opLat=24
+pipelined=false
[system.cpu.fuPool.FUList4]
type=FUDesc
@@ -395,9 +393,9 @@
[system.cpu.fuPool.FUList4.opList]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=MemRead
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5]
type=FUDesc
@@ -409,142 +407,142 @@
[system.cpu.fuPool.FUList5.opList00]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdAdd
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList01]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdAddAcc
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList02]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdAlu
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList03]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdCmp
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList04]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdCvt
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList05]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdMisc
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList06]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdMult
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList07]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdMultAcc
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList08]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdShift
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList09]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdShiftAcc
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList10]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdSqrt
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList11]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdFloatAdd
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList12]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdFloatAlu
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList13]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdFloatCmp
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList14]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdFloatCvt
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList15]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdFloatDiv
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList16]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdFloatMisc
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList17]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdFloatMult
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList18]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdFloatMultAcc
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList5.opList19]
type=OpDesc
eventq_index=0
-issueLat=1
opClass=SimdFloatSqrt
opLat=1
+pipelined=true
[system.cpu.fuPool.FUList6]
type=FUDesc
@@ -556,9 +554,9 @@
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