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Review request for Default. Repository: gem5 Description ------- Changeset 10924:c35c4f4a93c6 --------------------------- dev: Implement a simple display timing generator Timing generator for a pixel-based display. The timing generator is intended for display processors driving a standard rasterized display. The simplest possible display processor needs to derive from this class and override the nextPixel() method to feed the display with pixel data. Pixels are ordered relative to the top left corner of the display. Scan lines appear in the following order: * Vertical Sync (starting at line 0) * Vertical back porch * Visible lines * Vertical front porch Pixel order within a scan line: * Horizontal Sync * Horizontal Back Porch * Visible pixels * Horizontal Front Porch All events in the timing generator are automatically suspended on a drain() request and restarted on drainResume(). This is conceptually equivalent to clock gating when the pixel clock while the system is draining. By gating the pixel clock, we prevent display controllers from disturbing a memory system that is about to drain. Diffs ----- src/dev/SConscript 5c76426fd9ee src/dev/pixelpump.hh PRE-CREATION src/dev/pixelpump.cc PRE-CREATION Diff: http://reviews.gem5.org/r/2949/diff/ Testing ------- Thanks, Andreas Sandberg _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
