On Mon, 27 Jul 2015, Andreas Hansson wrote:
Hi Nilay,
The first two issues pointed out by Giacomo are not addressed.
May 22nd: In general, I like the idea of adding a vector type, as it's
going to be a more future-proof solution, and ARMv8 code could benefit as
well from that... but I have a few concerns regarding this code as it
stands currently:
1. The patch doesn't address the problem of overlapping registers (for now
it's only xmm's & ymm's, but zmm's are likely to join the party soon); in
this context, it's not clear to me if we'd need something fundamentally
different already at this stage to address that - the risk is to upstream
this code and then later discover that we need a different strategy for
overlapping. Maybe just having a plan on how to address that in the future
could be enough at this stage?
Overlapping registers are supported by this patch.
I wrote to gem5-dev on July 6th: I have reimplemented SSE instructions
using the new type, and I did not find the new type to be limiting in any
sense.
Further, we can implement AVX and AVX-512 instructions without changing
anything to the register type.
2. In the interim we would have broken SSE-AVX/AVX-2 interworking. Now
here I'm not sure where the gem5 community draws the line in terms of ISA
correctness vs. getting code out of the door for early experiments, etc.
:) At least it would be good to have some thoughts from the wider gem5
community here...
There is nothing broken right now. And I would not commit patches in a
broken state at any point of time, certainly not intentionally.
We would really appreciate if this can be reverted so that we can resolve
the aforementioned issues before any changes are pushed.
Andreas, I'll reiterate what I said before. I don't think there are any
issues that have not been addressed. I find the current vector register
type sufficient for gem5's purposes.
--
Nilay
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