changeset a588fceeb834 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a588fceeb834
description:
        ruby: give access to cache tag/data latencies from SLICC

        This patch exposes the tag and data array latencies to the SLICC state 
machines
        so that it can be used to determine the correct enqueue latency for 
response
        messages.

diffstat:

 src/mem/protocol/RubySlicc_Types.sm    |  2 ++
 src/mem/ruby/structures/BankedArray.hh |  1 +
 src/mem/ruby/structures/CacheMemory.hh |  3 +++
 3 files changed, 6 insertions(+), 0 deletions(-)

diffs (36 lines):

diff -r bde347fc89ae -r a588fceeb834 src/mem/protocol/RubySlicc_Types.sm
--- a/src/mem/protocol/RubySlicc_Types.sm       Mon Jul 20 09:15:18 2015 -0500
+++ b/src/mem/protocol/RubySlicc_Types.sm       Mon Jul 20 09:15:18 2015 -0500
@@ -149,6 +149,8 @@
   void deallocate(Address);
   AbstractCacheEntry lookup(Address);
   bool isTagPresent(Address);
+  Cycles getTagLatency();
+  Cycles getDataLatency();
   void setMRU(Address);
   void recordRequestType(CacheRequestType);
   bool checkResourceAvailable(CacheResourceType, Address);
diff -r bde347fc89ae -r a588fceeb834 src/mem/ruby/structures/BankedArray.hh
--- a/src/mem/ruby/structures/BankedArray.hh    Mon Jul 20 09:15:18 2015 -0500
+++ b/src/mem/ruby/structures/BankedArray.hh    Mon Jul 20 09:15:18 2015 -0500
@@ -70,6 +70,7 @@
     // This is so we don't get aliasing on blocks being replaced
     bool tryAccess(int64 idx);
 
+    Cycles getLatency() const { return accessLatency; }
 };
 
 #endif
diff -r bde347fc89ae -r a588fceeb834 src/mem/ruby/structures/CacheMemory.hh
--- a/src/mem/ruby/structures/CacheMemory.hh    Mon Jul 20 09:15:18 2015 -0500
+++ b/src/mem/ruby/structures/CacheMemory.hh    Mon Jul 20 09:15:18 2015 -0500
@@ -91,6 +91,9 @@
     const AbstractCacheEntry* lookup(const Address& address) const;
 
     Cycles getLatency() const { return m_latency; }
+    Cycles getTagLatency() const { return tagArray.getLatency(); }
+    Cycles getDataLatency() const { return dataArray.getLatency(); }
+
 
     // Hook for checkpointing the contents of the cache
     void recordCacheContents(int cntrl, CacheRecorder* tr) const;
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