[gem5-dev] changeset in gem5: ruby: adds set and way indices to AbstractCac...

[Nilay Vaish]

changeset dec9cb2c5cde in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=dec9cb2c5cde
description:
        ruby: adds set and way indices to AbstractCacheEntry

diffstat:

 src/mem/ruby/slicc_interface/AbstractCacheEntry.hh |  19 ++++++++++++++++---
 src/mem/ruby/structures/CacheMemory.cc             |   4 +++-
 2 files changed, 19 insertions(+), 4 deletions(-)

diffs (50 lines):

diff -r 3815437cb231 -r dec9cb2c5cde 
src/mem/ruby/slicc_interface/AbstractCacheEntry.hh
--- a/src/mem/ruby/slicc_interface/AbstractCacheEntry.hh        Fri Aug 14 
19:28:43 2015 -0500
+++ b/src/mem/ruby/slicc_interface/AbstractCacheEntry.hh        Fri Aug 14 
19:28:43 2015 -0500
@@ -62,9 +62,22 @@
     void clearLocked();
     bool isLocked(int context) const;
 
-    Addr m_Address; // Address of this block, required by CacheMemory
-    int m_locked; // Holds info whether the address is locked,
-                  // required for implementing LL/SC
+    void setSetIndex(uint32_t s) { m_set_index = s; }
+    uint32_t getSetIndex() const { return m_set_index; }
+
+    void setWayIndex(uint32_t s) { m_way_index = s; }
+    uint32_t getWayIndex() const { return m_way_index; }
+
+    // Address of this block, required by CacheMemory
+    Addr m_Address;
+    // Holds info whether the address is locked.
+    // Required for implementing LL/SC operations.
+    int m_locked;
+
+  private:
+    // Set and way coordinates of the entry within the cache memory object.
+    uint32_t m_set_index;
+    uint32_t m_way_index;
 };
 
 inline std::ostream&
diff -r 3815437cb231 -r dec9cb2c5cde src/mem/ruby/structures/CacheMemory.cc
--- a/src/mem/ruby/structures/CacheMemory.cc    Fri Aug 14 19:28:43 2015 -0500
+++ b/src/mem/ruby/structures/CacheMemory.cc    Fri Aug 14 19:28:43 2015 -0500
@@ -251,7 +251,7 @@
 }
 
 AbstractCacheEntry*
-CacheMemory::allocate(Addr address, AbstractCacheEntry* entry, bool touch)
+CacheMemory::allocate(Addr address, AbstractCacheEntry *entry, bool touch)
 {
     assert(address == makeLineAddress(address));
     assert(!isTagPresent(address));
@@ -270,6 +270,8 @@
                     address);
             set[i]->m_locked = -1;
             m_tag_index[address] = i;
+            entry->setSetIndex(cacheSet);
+            entry->setWayIndex(i);
 
             if (touch) {
                 m_replacementPolicy_ptr->touch(cacheSet, i, curTick());
_______________________________________________
gem5-dev mailing list
gem5-dev@gem5.org
http://m5sim.org/mailman/listinfo/gem5-dev