changeset da477ae38907 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=da477ae38907
description:
cpu, o3: consider split requests for LSQ checksnoop operations
This patch enables instructions in LSQ to track two physical addresses
for
corresponding two split requests. Later, the information is used in
checksnoop() to search for/invalidate the corresponding LD instructions.
The current implementation has kept track of only the physical address
that is
referenced by the first split request. Thus, for checksnoop(), the line
accessed by the second request has not been considered, causing
potential
correctness issues.
Committed by: Nilay Vaish <[email protected]>
diffstat:
src/cpu/base_dyn_inst.hh | 17 +++++++++++++++--
src/cpu/base_dyn_inst_impl.hh | 3 ++-
src/cpu/o3/iew_impl.hh | 4 ++--
src/cpu/o3/lsq_unit_impl.hh | 18 ++++++++++++------
4 files changed, 31 insertions(+), 11 deletions(-)
diffs (106 lines):
diff -r efaacec43726 -r da477ae38907 src/cpu/base_dyn_inst.hh
--- a/src/cpu/base_dyn_inst.hh Mon Sep 14 10:14:50 2015 -0500
+++ b/src/cpu/base_dyn_inst.hh Tue Sep 15 08:14:06 2015 -0500
@@ -215,7 +215,12 @@
Addr effAddr;
/** The effective physical address. */
- Addr physEffAddr;
+ Addr physEffAddrLow;
+
+ /** The effective physical address
+ * of the second request for a split request
+ */
+ Addr physEffAddrHigh;
/** The memory request flags (from translation). */
unsigned memReqFlags;
@@ -1056,7 +1061,15 @@
instFlags[IsStrictlyOrdered] = state->isStrictlyOrdered();
if (fault == NoFault) {
- physEffAddr = state->getPaddr();
+ // save Paddr for a single req
+ physEffAddrLow = state->getPaddr();
+
+ // case for the request that has been split
+ if (state->isSplit) {
+ physEffAddrLow = state->sreqLow->getPaddr();
+ physEffAddrHigh = state->sreqHigh->getPaddr();
+ }
+
memReqFlags = state->getFlags();
if (state->mainReq->isCondSwap()) {
diff -r efaacec43726 -r da477ae38907 src/cpu/base_dyn_inst_impl.hh
--- a/src/cpu/base_dyn_inst_impl.hh Mon Sep 14 10:14:50 2015 -0500
+++ b/src/cpu/base_dyn_inst_impl.hh Tue Sep 15 08:14:06 2015 -0500
@@ -88,7 +88,8 @@
{
memData = NULL;
effAddr = 0;
- physEffAddr = 0;
+ physEffAddrLow = 0;
+ physEffAddrHigh = 0;
readyRegs = 0;
memReqFlags = 0;
diff -r efaacec43726 -r da477ae38907 src/cpu/o3/iew_impl.hh
--- a/src/cpu/o3/iew_impl.hh Mon Sep 14 10:14:50 2015 -0500
+++ b/src/cpu/o3/iew_impl.hh Tue Sep 15 08:14:06 2015 -0500
@@ -1347,7 +1347,7 @@
DPRINTF(IEW, "LDSTQ detected a violation. Violator PC: %s "
"[sn:%lli], inst PC: %s [sn:%lli]. Addr is: %#x.\n",
violator->pcState(), violator->seqNum,
- inst->pcState(), inst->seqNum, inst->physEffAddr);
+ inst->pcState(), inst->seqNum, inst->physEffAddrLow);
fetchRedirect[tid] = true;
@@ -1370,7 +1370,7 @@
DPRINTF(IEW, "LDSTQ detected a violation. Violator PC: "
"%s, inst PC: %s. Addr is: %#x.\n",
violator->pcState(), inst->pcState(),
- inst->physEffAddr);
+ inst->physEffAddrLow);
DPRINTF(IEW, "Violation will not be handled because "
"already squashing\n");
diff -r efaacec43726 -r da477ae38907 src/cpu/o3/lsq_unit_impl.hh
--- a/src/cpu/o3/lsq_unit_impl.hh Mon Sep 14 10:14:50 2015 -0500
+++ b/src/cpu/o3/lsq_unit_impl.hh Tue Sep 15 08:14:06 2015 -0500
@@ -453,10 +453,13 @@
DynInstPtr ld_inst = loadQueue[load_idx];
if (ld_inst) {
- Addr load_addr = ld_inst->physEffAddr & cacheBlockMask;
+ Addr load_addr_low = ld_inst->physEffAddrLow & cacheBlockMask;
+ Addr load_addr_high = ld_inst->physEffAddrHigh & cacheBlockMask;
+
// Check that this snoop didn't just invalidate our lock flag
- if (ld_inst->effAddrValid() && load_addr == invalidate_addr &&
- ld_inst->memReqFlags & Request::LLSC)
+ if (ld_inst->effAddrValid() && (load_addr_low == invalidate_addr
+ || load_addr_high == invalidate_addr)
+ && ld_inst->memReqFlags & Request::LLSC)
TheISA::handleLockedSnoopHit(ld_inst.get());
}
@@ -476,11 +479,14 @@
continue;
}
- Addr load_addr = ld_inst->physEffAddr & cacheBlockMask;
+ Addr load_addr_low = ld_inst->physEffAddrLow & cacheBlockMask;
+ Addr load_addr_high = ld_inst->physEffAddrHigh & cacheBlockMask;
+
DPRINTF(LSQUnit, "-- inst [sn:%lli] load_addr: %#x to pktAddr:%#x\n",
- ld_inst->seqNum, load_addr, invalidate_addr);
+ ld_inst->seqNum, load_addr_low, invalidate_addr);
- if (load_addr == invalidate_addr || force_squash) {
+ if ((load_addr_low == invalidate_addr
+ || load_addr_high == invalidate_addr) || force_squash) {
if (needsTSO) {
// If we have a TSO system, as all loads must be ordered with
// all other loads, this load as well as *all* subsequent loads
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