----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3139/#review7329 -----------------------------------------------------------
Nilay, it's also possible that this change breaks the priority ordering of message buffers in SLICC. When the wakeups are done on a per-controller basis, the controller enforces that the message buffers are looked at in priority order. Since this change makes the wakeups per-buffer, it's possible that a lower-priority buffer could keep getting serviced first, leading to lower performance of the simulated system and possibly deadlock. Do you have any mechanism present in the code to prevent this? I couldn't see one, but perhaps I'm missing something. To solve this problem, we may just need to give events from each message buffer their corresponding priority in the global event queue. - Yatin Manerkar On Sept. 24, 2015, 2:58 p.m., Nilay Vaish wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3139/ > ----------------------------------------------------------- > > (Updated Sept. 24, 2015, 2:58 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 11137:70bfe6d0a764 > --------------------------- > ruby: consumer: move away from Consumer class > > Objects in ruby memory system typically inherit from the Consumer class that > provides support for scheduling events. The Consumer class maintains a > std::set > of times at which events have been posted by the Derived class object. > Typically > this causes a lot of overhead. Secondly, the objects schedule events that are > very coarse grained. This patch reduces ruby memory system's reliance on the > Consumer > class. > > The patch changes the objects in the Network and the generated code for > Controllers > in a significant way. The generated controllers would now schedule events for > individual input ports and not for the entire controller itself. Similarly, > PerfectSwitch > and Throttle would now schedule events on individual message buffers and not > for the > entire object. This avoids looking at buffers that do not have any message > pending. > > > Diffs > ----- > > src/mem/ruby/structures/TimerTable.cc 5d38dc2f7d66 > src/mem/slicc/ast/FuncCallExprAST.py 5d38dc2f7d66 > src/mem/slicc/ast/IfStatementAST.py 5d38dc2f7d66 > src/mem/slicc/ast/InPortDeclAST.py 5d38dc2f7d66 > src/mem/slicc/symbols/StateMachine.py 5d38dc2f7d66 > src/mem/ruby/structures/RubyMemoryControl.cc 5d38dc2f7d66 > src/mem/ruby/structures/TimerTable.hh 5d38dc2f7d66 > src/mem/ruby/network/MessageBuffer.hh 5d38dc2f7d66 > src/mem/ruby/network/MessageBuffer.cc 5d38dc2f7d66 > src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.hh > 5d38dc2f7d66 > src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc > 5d38dc2f7d66 > src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh 5d38dc2f7d66 > src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.cc 5d38dc2f7d66 > src/mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh 5d38dc2f7d66 > src/mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.cc 5d38dc2f7d66 > src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.hh > 5d38dc2f7d66 > src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc > 5d38dc2f7d66 > src/mem/ruby/network/garnet/flexible-pipeline/NetworkLink.hh 5d38dc2f7d66 > src/mem/ruby/network/garnet/flexible-pipeline/NetworkLink.cc 5d38dc2f7d66 > src/mem/ruby/network/garnet/flexible-pipeline/Router.cc 5d38dc2f7d66 > src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh 5d38dc2f7d66 > src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.cc 5d38dc2f7d66 > src/mem/ruby/network/simple/PerfectSwitch.hh 5d38dc2f7d66 > src/mem/ruby/network/simple/PerfectSwitch.cc 5d38dc2f7d66 > src/mem/ruby/network/simple/Throttle.hh 5d38dc2f7d66 > src/mem/ruby/network/simple/Throttle.cc 5d38dc2f7d66 > src/mem/ruby/slicc_interface/AbstractController.hh 5d38dc2f7d66 > src/mem/ruby/slicc_interface/AbstractController.cc 5d38dc2f7d66 > src/mem/ruby/slicc_interface/Message.hh 5d38dc2f7d66 > src/mem/ruby/structures/RubyMemoryControl.hh 5d38dc2f7d66 > > Diff: http://reviews.gem5.org/r/3139/diff/ > > > Testing > ------- > > > Thanks, > > Nilay Vaish > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
