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Please provide a description for this patch. src/mem/protocol/RubySlicc_Exports.sm (line 189) <http://reviews.gem5.org/r/3177/#comment6285> I don't understand the reason for distinguising _wCC types. Should L1Cache/L2Cache types not provide cache coherence? More generally, if we're going to define these statically, we should make sure that they are descriptive and provide a fairly complete set of machine type names for existing protocols. Can you please update these and provide clearer comments as appropriate? - Joel Hestness On Oct. 30, 2015, 9:49 p.m., Tony Gutierrez wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3177/ > ----------------------------------------------------------- > > (Updated Oct. 30, 2015, 9:49 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 11183:4565e2649f8f > --------------------------- > ruby: imported from reviewboard patch 2551 > > filename temp_nilay_machtype.patch > > > Diffs > ----- > > src/mem/slicc/symbols/Type.py 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/slicc/symbols/SymbolTable.py > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/slicc/parser.py 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/slicc/ast/MachineAST.py 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/slicc/ast/DeclListAST.py 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/protocol/MESI_Two_Level-L1cache.sm > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/protocol/MESI_Two_Level-L2cache.sm > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/protocol/MESI_Two_Level-dir.sm > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/protocol/MESI_Two_Level-dma.sm > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/protocol/RubySlicc_Exports.sm > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > > Diff: http://reviews.gem5.org/r/3177/diff/ > > > Testing > ------- > > > Thanks, > > Tony Gutierrez > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
