Hi Blake, Thanks for the support. The problem is that I am really new to this architecture area and so to Gem5. So I am hoping to have your support in future also.
regards, Rohith On Wed, Nov 4, 2015 at 10:29 PM, Geoffrey Blake <[email protected]> wrote: > Hi Rohith, > > It is possible to add the code you are suggesting in your message. You > will also have to modify the simulator atomic CPU models to do the proper > things to not leak memory accesses, and perform rollback of the > transactional state in case of conflicts in addition to adding your > database based conflict detection and versioning. If you intend to extend > this to timing mode and the caches you will also have to dig into the cache > coherence and cache models as well unless faking it via the database is > sufficient for your needs. > > In the past I had a version of gem5 that had LogTM support for Alpha, and > it appears to still exist at http://www.eecs.umich.edu/~blakeg/ at the > bottom of the page if you want to look at a potential starting point. > > Thanks, > Geoff Blake > > On Wed, Nov 4, 2015 at 6:00 AM, rohith mathew <[email protected]> > wrote: > > > Hi all, > > > > I'm trying to implement a syatem with a Hardware Transactional > Memory(HTM) > > in gem5 with x86. I just want to know whether it is possible to have a > > database in the main memory for the operation of HTM. If possible can > > anyone give me some suggestions to do that. > > > > Thanks in advance. > > > > regards, > > Rohith > > _______________________________________________ > > gem5-dev mailing list > > [email protected] > > http://m5sim.org/mailman/listinfo/gem5-dev > > > _______________________________________________ > gem5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/gem5-dev > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
