> On Oct. 30, 2015, 10:14 p.m., Andreas Hansson wrote: > > To me this seems redundant. We already have SimpleMemory. Why not use that? > > Andreas Hansson wrote: > Ping
The intention of this patch is to handle a large number of requests at main memory while ignoring detailed DRAM modeling/bus contention. SimpleMemory restricts the number of requests that can be issued based on the bandwidth. We are testing subclassing SimpleMemory with (infinitely) large bandwidth to see if behaves as we expect, then we can repost a patch using SimpleMemory. - Matthew ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3190/#review7425 ----------------------------------------------------------- On Oct. 30, 2015, 9:51 p.m., Tony Gutierrez wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3190/ > ----------------------------------------------------------- > > (Updated Oct. 30, 2015, 9:51 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 11196:bb9212a4b8d1 > --------------------------- > ruby: fixed latency memory controller > > This patch adds a simple fixed latency dram model to facilitate simple > limit-study investigations. > > > Diffs > ----- > > src/mem/ruby/system/FixedLatencyMemoryControl.py PRE-CREATION > src/mem/ruby/system/SConscript 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > configs/common/Options.py 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/system/FixedLatencyMemoryControl.hh PRE-CREATION > src/mem/ruby/system/FixedLatencyMemoryControl.cc PRE-CREATION > > Diff: http://reviews.gem5.org/r/3190/diff/ > > > Testing > ------- > > > Thanks, > > Tony Gutierrez > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
