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Ship it! Ship It! - Steve Reinhardt On Nov. 15, 2015, 8:03 a.m., Andreas Sandberg wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3204/ > ----------------------------------------------------------- > > (Updated Nov. 15, 2015, 8:03 a.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 11212:d32ac49afe6f > --------------------------- > dev: Rewrite PCI host functionality > > The gem5's current PCI host functionality is very ad hoc. The current > implementations require PCI devices to be hooked up to the > configuration space via a separate configuration port. Devices query > the platform to get their config-space address range. Un-mapped parts > of the config space are intercepted using the XBar's default port > mechanism and a magic catch-all device (PciConfigAll). > > This changeset redesigns the PCI host functionality to improve code > reuse and make config-space and interrupt mapping more > transparent. Existing platform code has been updated to use the new > PCI host and configured to stay backwards compatible (i.e., no > guest-side visible changes). The current implementation does not > expose any new functionality, but it can easily be extended with > features such as automatic interrupt mapping. > > PCI devices now register themselves with a PCI host controller. The > host controller interface is defined in the abstract base class > PciHost. Registration is done by PciHost::registerDevice() which takes > the device, its bus position (bus/dev/func tuple), and its interrupt > pin (INTA-INTC) as a parameter. The registration interface returns a > PciHost::DeviceInterface that the PCI device can use to query memory > mappings and signal interrupts. > > The host device manages the entire PCI configuration space. Accesses > to devices decoded into the devices bus position and then forwarded to > the correct device. > > Basic PCI host functionality is implemented in the GenericPciHost base > class. Most platforms can use this class as a basic PCI controller. It > provides the following functionality: > > * Configurable configuration space decoding. The number of bits > dedicated to a device is a prameter, making it possible to support > both CAM, ECAM, and legacy mappings. > > * Basic interrupt mapping using the interruptLine value from a > device's configuration space. This behavior is the same as in the > old implementation. More advanced controllers can override the > interrupt mapping method to dynamically assign host interrupts to > PCI devices. > > * Simple (base + addr) remapping from the PCI bus's address space to > physical addresses for PIO, memory, and DMA. > > > Diffs > ----- > > src/dev/alpha/Tsunami.py 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/alpha/tsunami.hh 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/alpha/tsunami.cc 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/alpha/tsunami_pchip.hh 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/alpha/tsunami_pchip.cc 64c0ebeae22426aa54d5e9b3244163a26b39aebc > configs/common/FSConfig.py 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/Pci.py 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/SConscript 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/platform.hh 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/platform.cc 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/x86/Pc.py 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/x86/SouthBridge.py 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/x86/pc.hh 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/x86/pc.cc 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/pci/SConscript PRE-CREATION > src/dev/pci/host.hh PRE-CREATION > src/dev/pci/host.cc PRE-CREATION > src/dev/pci/types.hh PRE-CREATION > src/dev/pciconfigall.hh 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/pciconfigall.cc 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/pcidev.hh 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/pcidev.cc 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/arm/realview.cc 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/pci/PciHost.py PRE-CREATION > src/dev/arm/RealView.py 64c0ebeae22426aa54d5e9b3244163a26b39aebc > src/dev/arm/realview.hh 64c0ebeae22426aa54d5e9b3244163a26b39aebc > > Diff: http://reviews.gem5.org/r/3204/diff/ > > > Testing > ------- > > Quick regressions pass. Manually verified the diff between two checkpoints of > a booted system. > > > Thanks, > > Andreas Sandberg > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
