changeset 2fb745f69681 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=2fb745f69681
description:
cpu: Enforce 1 interrupt controller per thread
Consider it a fatal configuration error if the number of interrupt
controllers doesn't match the number of threads in an SMT
configuration.
diffstat:
src/cpu/base.cc | 14 ++++++--------
1 files changed, 6 insertions(+), 8 deletions(-)
diffs (24 lines):
diff -r c0ea80fed78f -r 2fb745f69681 src/cpu/base.cc
--- a/src/cpu/base.cc Mon Nov 16 05:10:45 2015 -0600
+++ b/src/cpu/base.cc Fri Nov 20 14:50:17 2015 -0600
@@ -237,14 +237,12 @@
// The interrupts should always be present unless this CPU is
// switched in later or in case it is a checker CPU
if (!params()->switched_out && !is_checker) {
- if (!interrupts.empty()) {
- for (ThreadID tid = 0; tid < numThreads; tid++) {
- interrupts[tid]->setCPU(this);
- }
- } else {
- fatal("CPU %s has no interrupt controller.\n"
- "Ensure createInterruptController() is called.\n", name());
- }
+ fatal_if(interrupts.size() != numThreads,
+ "CPU %s has %i interrupt controllers, but is expecting one "
+ "per thread (%i)\n",
+ name(), interrupts.size(), numThreads);
+ for (ThreadID tid = 0; tid < numThreads; tid++)
+ interrupts[tid]->setCPU(this);
}
if (FullSystem) {
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