changeset a368064a2ab5 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a368064a2ab5
description:
scons: Enable -Wextra by default
Make best use of the compiler, and enable -Wextra as well as
-Wall. There are a few issues that had to be resolved, but they are
all trivial.
diffstat:
SConstruct | 17 ++++++-----------
ext/dramsim2/SConscript | 3 ++-
ext/libelf/SConscript | 8 ++++----
ext/nomali/SConscript | 1 +
src/SConscript | 18 +++++-------------
src/arch/alpha/faults.hh | 2 +-
src/arch/alpha/utility.hh | 2 +-
src/arch/arm/faults.hh | 2 +-
src/arch/arm/utility.cc | 2 +-
src/arch/mips/faults.hh | 2 +-
src/arch/mips/isa/decoder.isa | 4 ++--
src/arch/sparc/isa/decoder.isa | 16 ++++++++--------
src/base/bitunion.hh | 12 ++++++------
src/cpu/base_dyn_inst.hh | 6 +++---
src/cpu/pred/sat_counter.hh | 2 +-
src/cpu/trace/trace_cpu.cc | 4 ++--
src/dev/arm/hdlcd.hh | 2 +-
src/dev/arm/pl011.hh | 2 +-
src/dev/net/ethertap.cc | 2 +-
src/dev/net/ns_gige_reg.h | 3 ++-
src/dev/net/pktfifo.hh | 2 +-
src/dev/sparc/iob.cc | 6 ++++--
src/dev/terminal.cc | 2 +-
src/mem/packet.hh | 2 +-
src/mem/page_table.hh | 1 +
src/mem/request.hh | 1 -
src/mem/ruby/slicc_interface/AbstractController.hh | 4 ++--
src/mem/ruby/slicc_interface/Message.hh | 6 +++---
src/mem/ruby/structures/RubyMemoryControl.cc | 10 +++++-----
src/mem/ruby/structures/RubyMemoryControl.hh | 10 +++++-----
src/mem/ruby/system/RubySystem.hh | 2 +-
src/sim/process.cc | 5 +++--
src/sim/sim_events.hh | 6 +++---
33 files changed, 80 insertions(+), 87 deletions(-)
diffs (truncated from 690 to 300 lines):
diff -r 25352d3d491e -r a368064a2ab5 SConstruct
--- a/SConstruct Mon Jan 11 05:52:18 2016 -0500
+++ b/SConstruct Mon Jan 11 05:52:20 2016 -0500
@@ -554,14 +554,12 @@
# As gcc and clang share many flags, do the common parts here
main.Append(CCFLAGS=['-pipe'])
main.Append(CCFLAGS=['-fno-strict-aliasing'])
- # Enable -Wall and then disable the few warnings that we
- # consistently violate
- main.Append(CCFLAGS=['-Wall', '-Wno-sign-compare', '-Wundef'])
+ # Enable -Wall and -Wextra and then disable the few warnings that
+ # we consistently violate
+ main.Append(CCFLAGS=['-Wall', '-Wundef', '-Wextra',
+ '-Wno-sign-compare', '-Wno-unused-parameter'])
# We always compile using C++11
main.Append(CXXFLAGS=['-std=c++11'])
- # Add selected sanity checks from -Wextra
- main.Append(CXXFLAGS=['-Wmissing-field-initializers',
- '-Woverloaded-virtual'])
else:
print termcap.Yellow + termcap.Bold + 'Error' + termcap.Normal,
print "Don't know what compiler options to use for your compiler."
@@ -656,14 +654,11 @@
print 'Error: Unable to determine clang version.'
Exit(1)
- # clang has a few additional warnings that we disable,
- # tautological comparisons are allowed due to unsigned integers
- # being compared to constants that happen to be 0, and extraneous
+ # clang has a few additional warnings that we disable, extraneous
# parantheses are allowed due to Ruby's printing of the AST,
# finally self assignments are allowed as the generated CPU code
# is relying on this
- main.Append(CCFLAGS=['-Wno-tautological-compare',
- '-Wno-parentheses',
+ main.Append(CCFLAGS=['-Wno-parentheses',
'-Wno-self-assign',
# Some versions of libstdc++ (4.8?) seem to
# use struct hash and class hash
diff -r 25352d3d491e -r a368064a2ab5 ext/dramsim2/SConscript
--- a/ext/dramsim2/SConscript Mon Jan 11 05:52:18 2016 -0500
+++ b/ext/dramsim2/SConscript Mon Jan 11 05:52:20 2016 -0500
@@ -77,7 +77,8 @@
# If we are using clang, there are more flags to disable
if main['CLANG']:
- dramenv.Append(CCFLAGS=['-Wno-unused-private-field'])
+ dramenv.Append(CCFLAGS=['-Wno-unused-private-field',
+ '-Wno-tautological-undefined-compare'])
# Tell DRAMSim2 to not store any data as this is already covered by
# the wrapper
diff -r 25352d3d491e -r a368064a2ab5 ext/libelf/SConscript
--- a/ext/libelf/SConscript Mon Jan 11 05:52:18 2016 -0500
+++ b/ext/libelf/SConscript Mon Jan 11 05:52:20 2016 -0500
@@ -93,10 +93,10 @@
m4env = main.Clone()
if m4env['GCC']:
- m4env.Append(CCFLAGS=['-Wno-pointer-sign'])
- if compareVersions(m4env['GCC_VERSION'], '4.6') >= 0:
- m4env.Append(CCFLAGS=['-Wno-unused-but-set-variable',
- '-Wno-implicit-function-declaration'])
+ m4env.Append(CCFLAGS=['-Wno-pointer-sign',
+ '-Wno-unused-but-set-variable',
+ '-Wno-implicit-function-declaration',
+ '-Wno-override-init'])
if m4env['CLANG']:
m4env.Append(CCFLAGS=['-Wno-initializer-overrides', '-Wno-pointer-sign'])
# clang defaults to c99 (while gcc defaults to gnu89) and there is a
diff -r 25352d3d491e -r a368064a2ab5 ext/nomali/SConscript
--- a/ext/nomali/SConscript Mon Jan 11 05:52:18 2016 -0500
+++ b/ext/nomali/SConscript Mon Jan 11 05:52:20 2016 -0500
@@ -42,6 +42,7 @@
main.Prepend(CPPPATH=Dir('./include'))
nomali = main.Clone()
+nomali.Append(CCFLAGS=['-Wno-ignored-qualifiers'])
nomali_sources = [
"lib/gpu.cc",
diff -r 25352d3d491e -r a368064a2ab5 src/SConscript
--- a/src/SConscript Mon Jan 11 05:52:18 2016 -0500
+++ b/src/SConscript Mon Jan 11 05:52:20 2016 -0500
@@ -1018,11 +1018,6 @@
# the SWIG generated code
swig_env.Append(CCFLAGS=['-Wno-unused-label', '-Wno-unused-value'])
- # Add additional warnings here that should not be applied to
- # the SWIG generated code
- new_env.Append(CXXFLAGS=['-Wmissing-declarations',
- '-Wdelete-non-virtual-dtor'])
-
if env['GCC']:
# Depending on the SWIG version, we also need to supress
# warnings about uninitialized variables and missing field
@@ -1030,7 +1025,8 @@
swig_env.Append(CCFLAGS=['-Wno-uninitialized',
'-Wno-missing-field-initializers',
'-Wno-unused-but-set-variable',
- '-Wno-maybe-uninitialized'])
+ '-Wno-maybe-uninitialized',
+ '-Wno-type-limits'])
# Only gcc >= 4.9 supports UBSan, so check both the version
# and the command-line option before adding the compiler and
@@ -1041,13 +1037,9 @@
new_env.Append(LINKFLAGS='-fsanitize=undefined')
if env['CLANG']:
- swig_env.Append(CCFLAGS=[
- # Some versions of SWIG can return uninitialized values
- '-Wno-sometimes-uninitialized',
- # Register storage is requested in a lot of places in
- # SWIG-generated code.
- '-Wno-deprecated-register',
- ])
+ swig_env.Append(CCFLAGS=['-Wno-sometimes-uninitialized',
+ '-Wno-deprecated-register',
+ '-Wno-tautological-compare'])
# All supported clang versions have support for UBSan, so if
# asked to use it, append the compiler and linker flags.
diff -r 25352d3d491e -r a368064a2ab5 src/arch/alpha/faults.hh
--- a/src/arch/alpha/faults.hh Mon Jan 11 05:52:18 2016 -0500
+++ b/src/arch/alpha/faults.hh Mon Jan 11 05:52:20 2016 -0500
@@ -40,7 +40,7 @@
namespace AlphaISA {
-typedef const Addr FaultVect;
+typedef Addr FaultVect;
class AlphaFault : public FaultBase
{
diff -r 25352d3d491e -r a368064a2ab5 src/arch/alpha/utility.hh
--- a/src/arch/alpha/utility.hh Mon Jan 11 05:52:18 2016 -0500
+++ b/src/arch/alpha/utility.hh Mon Jan 11 05:52:20 2016 -0500
@@ -78,7 +78,7 @@
inline Addr PteAddr(Addr a) { return (a & PteMask) << PteShift; }
// User Virtual
-inline bool IsUSeg(Addr a) { return USegBase <= a && a <= USegEnd; }
+inline bool IsUSeg(Addr a) { assert(USegBase == 0); return a <= USegEnd; }
// Kernel Direct Mapped
inline bool IsK0Seg(Addr a) { return K0SegBase <= a && a <= K0SegEnd; }
diff -r 25352d3d491e -r a368064a2ab5 src/arch/arm/faults.hh
--- a/src/arch/arm/faults.hh Mon Jan 11 05:52:18 2016 -0500
+++ b/src/arch/arm/faults.hh Mon Jan 11 05:52:20 2016 -0500
@@ -58,7 +58,7 @@
namespace ArmISA
{
-typedef const Addr FaultOffset;
+typedef Addr FaultOffset;
class ArmFault : public FaultBase
{
diff -r 25352d3d491e -r a368064a2ab5 src/arch/arm/utility.cc
--- a/src/arch/arm/utility.cc Mon Jan 11 05:52:18 2016 -0500
+++ b/src/arch/arm/utility.cc Mon Jan 11 05:52:20 2016 -0500
@@ -209,7 +209,7 @@
// We deliberately extend both the Cluster ID and CPU ID fields to allow
// for simulation of larger systems
assert((0 <= tc->cpuId()) && (tc->cpuId() < 256));
- assert((0 <= tc->socketId()) && (tc->socketId() < 65536));
+ assert(tc->socketId() < 65536);
if (arm_sys->multiThread) {
return 0x80000000 | // multiprocessor extensions available
tc->contextId();
diff -r 25352d3d491e -r a368064a2ab5 src/arch/mips/faults.hh
--- a/src/arch/mips/faults.hh Mon Jan 11 05:52:18 2016 -0500
+++ b/src/arch/mips/faults.hh Mon Jan 11 05:52:20 2016 -0500
@@ -45,7 +45,7 @@
namespace MipsISA
{
-typedef const Addr FaultVect;
+typedef Addr FaultVect;
enum ExcCode {
// A dummy value to use when the code isn't defined or doesn't matter.
diff -r 25352d3d491e -r a368064a2ab5 src/arch/mips/isa/decoder.isa
--- a/src/arch/mips/isa/decoder.isa Mon Jan 11 05:52:18 2016 -0500
+++ b/src/arch/mips/isa/decoder.isa Mon Jan 11 05:52:20 2016 -0500
@@ -2404,7 +2404,7 @@
0x3: decode OP_LO {
format DspHiLoOp {
0x2: shilo({{
- if (sext<6>(HILOSA) < 0) {
+ if ((int64_t)sext<6>(HILOSA) < 0) {
dspac = (uint64_t)dspac <<
-sext<6>(HILOSA);
} else {
@@ -2413,7 +2413,7 @@
}
}});
0x3: shilov({{
- if (sext<6>(Rs_sw<5:0>) < 0) {
+ if ((int64_t)sext<6>(Rs_sw<5:0>) < 0) {
dspac = (uint64_t)dspac <<
-sext<6>(Rs_sw<5:0>);
} else {
diff -r 25352d3d491e -r a368064a2ab5 src/arch/sparc/isa/decoder.isa
--- a/src/arch/sparc/isa/decoder.isa Mon Jan 11 05:52:18 2016 -0500
+++ b/src/arch/sparc/isa/decoder.isa Mon Jan 11 05:52:20 2016 -0500
@@ -669,13 +669,13 @@
}});
0x43: FpUnimpl::fmovq_fcc1();
0x45: fmovrslez({{
- if (Rs1 <= 0)
+ if ((int64_t)Rs1 <= 0)
Frds = Frs2s;
else
Frds = Frds;
}});
0x46: fmovrdlez({{
- if (Rs1 <= 0)
+ if ((int64_t)Rs1 <= 0)
Frd = Frs2;
else
Frd = Frd;
@@ -740,13 +740,13 @@
}});
0x57: FpUnimpl::fcmpeq();
0x65: fmovrslz({{
- if (Rs1 < 0)
+ if ((int64_t)Rs1 < 0)
Frds = Frs2s;
else
Frds = Frds;
}});
0x66: fmovrdlz({{
- if (Rs1 < 0)
+ if ((int64_t)Rs1 < 0)
Frd = Frs2;
else
Frd = Frd;
@@ -792,26 +792,26 @@
}});
0xC3: FpUnimpl::fmovq_fcc3();
0xC5: fmovrsgz({{
- if (Rs1 > 0)
+ if ((int64_t)Rs1 > 0)
Frds = Frs2s;
else
Frds = Frds;
}});
0xC6: fmovrdgz({{
- if (Rs1 > 0)
+ if ((int64_t)Rs1 > 0)
Frd = Frs2;
else
Frd = Frd;
}});
0xC7: FpUnimpl::fmovrqgz();
0xE5: fmovrsgez({{
- if (Rs1 >= 0)
+ if ((int64_t)Rs1 >= 0)
Frds = Frs2s;
else
Frds = Frds;
}});
0xE6: fmovrdgez({{
- if (Rs1 >= 0)
+ if ((int64_t)Rs1 >= 0)
Frd = Frs2;
else
Frd = Frd;
diff -r 25352d3d491e -r a368064a2ab5 src/base/bitunion.hh
--- a/src/base/bitunion.hh Mon Jan 11 05:52:18 2016 -0500
+++ b/src/base/bitunion.hh Mon Jan 11 05:52:20 2016 -0500
@@ -89,7 +89,7 @@
"Bitfield ranges must be specified as <msb, lsb>");
public:
- operator const uint64_t () const
+ operator uint64_t () const
{
return this->getBits(first, last);
}
@@ -129,7 +129,7 @@
class BitfieldWO : public Bitfield<first, last>
{
private:
- operator const uint64_t () const;
+ operator uint64_t () const;
public:
using Bitfield<first, last>::operator=;
@@ -148,7 +148,7 @@
class SignedBitfield : public BitfieldBase<Type>
{
public:
- operator const int64_t () const
+ operator int64_t () const
{
return sext<first - last + 1>(this->getBits(first, last));
}
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev
